• Journal of electromagnetic engineering and science
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• v.6 no.2
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• pp.130-134
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• 2006

This paper presents the reduction characteristics of penetrated electromagnetic fields through a narrow slot in a planar conducting screen of infinite extent. When a plane wave is excited to the narrow slot, the aperture electric field is controlled by the parallel wire or parallel plate connected on the slot. The magnitude of penetrated electromagnetic fields through a narrow slot is controlled by electric field distributions on the slot. An integral equation for the aperture electric field on narrow slots is derived and solved by applying Galerkin's method of moments. The results show that the magnitude of the penetrated electromagnetic field can be effectively reduced by installing the parallel wire or parallel plate on the slot.

• ETRI Journal
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• v.31 no.5
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• pp.510-517
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• 2009

A high throughput parallel decoding method is developed for context-based adaptive variable length codes. In this paper, several new design ideas are devised and implemented for scalable parallel processing, a reduction in area, and a reduction in power requirements. First, simplified logical operations instead of memory lookups are used for parallel processing. Second, the codes are grouped based on their lengths for efficient logical operation. Third, up to M bits of the input stream can be analyzed simultaneously. For comparison, we designed a logical-operation-based parallel decoder for M=8 and a conventional parallel decoder. High-speed parallel decoding becomes possible with our method. In addition, for similar decoding rates (1.57 codes/cycle for M=8), our new approach uses 46% less chip area than the conventional method.

• IEIE Transactions on Smart Processing and Computing
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• v.3 no.6
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• pp.397-403
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• 2014

A new video compression standard called High Efficiency Video Coding (HEVC) has recently been released onto the market. HEVC provides higher coding performance compared to previous standards, but at the cost of a significant increase in encoding complexity, particularly in motion estimation (ME). At the same time, the computing capabilities of Graphics Processing Units (GPUs) have become more powerful. This paper proposes a parallel integer-pel ME (IME) algorithm for HEVC on GPU using the Compute Unified Device Architecture (CUDA). In the proposed IME, concurrent parallel reduction (CPR) is introduced. CPR performs several parallel reduction (PR) operations concurrently to solve two problems in conventional PR; low thread utilization and high thread synchronization latency. The proposed encoder reduces the portion of IME in the encoder to almost zero with a 2.3% increase in bitrate. In terms of IME, the proposed IME is up to 172.6 times faster than the IME in the HEVC reference model.

• Journal of electromagnetic engineering and science
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• v.6 no.2
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• pp.123-129
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• 2006

This paper presents a method of reducing penetration of penetrated electromagnetic fields through a narrow slot with parallel wire arrays in a planar conducting screen of infinite extent. An integral equation for the aperture electric field on the narrow slot is derived and solved by applying Galerkin's method of moments. When a plane wave is excited to the narrow slot, the aperture electric field is easily controlled by the parallel wire arrays connected on the slot and therefore the magnitude of the penetrated electric field is effectively reduced by loading the parallel wire arrays. The numerical results show that the magnitude of the penetrated electromagnetic field can be effectively reduced by installing the parallel wire arrays on the slot. The results of the calculated penetration electric fields are in good agreement with that of the measured results.

• International Journal of Naval Architecture and Ocean Engineering
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• v.13 no.1
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• pp.450-465
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• 2021

In this study, an attempt has been made to investigate the water-entry characteristics of the high-speed parallel projectile numerically. The shear stress transport k-𝜔 turbulence model and the Zwart-Gerber-Belamri cavitation model based on the Reynolds-Averaged Navier-Stokes method were used. The grid independent inspection and grid convergence index is carried out and verified. The influences of the parallel water-entry on flow filed characteristics, trajectory stability and drag reduction performance for different values of initial water-entry speed (𝜈₀ = 280 m/s, 340 m/s, 400 m/s) and clearance between the parallel projectiles (L_p = 0.5D, 1.0D, 2.0D, 3.0D) are presented and analyzed in detail. Under the condition of the parallel water-entry, it can be found that due to the intense interference between the parallel projectiles, the distribution of cavity is non-uniform and part of the projectile is exposed to water, resulting in the destruction of the cavity structure and the decline of trajectory stability. In addition, the parallel projectile suffers more severe lateral force that separates the two projectiles. The drag reduction performance is impacted and the velocity attenuation is accelerated as the clearance between the parallel projectiles reduces.

• Journal of Power Electronics
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• v.5 no.4
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• pp.312-318
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• 2005

This paper presents a compensator for reduction of the reactive lateral current in multiple autonomously controlled uninterruptible power supplies (UPS) connected in parallel. This compensator acts directly on the control equation for voltage amplitude and it provides an improved current distribution especially in the case of parallel connection of UPSs with different output power ratings. Observations show that the original control equation for output voltage amplitude is efficient for voltage regulation but it causes great variation of voltage levels. A compensator with the same structure is added to counterbalance the variation caused by the original control equation. Simulations show promising results with the employment of the proposed compensator. Our simulations are confirmed by experimental results using three UPSs with different output ratings and voltage limiters ($1\%$) connected in parallel under various conditions.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1997.10a
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• pp.299-302
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• 1997

The pressure ripples are inevitabilitily generated by a fluctuation of flow rate caused pump mechanism, which occur noises, vibrations, and affect a control performance in tluid pipeline. The method for reduction of pressure ripples has been normally used a accumulator which is installed near the pump generating the pressure ripples. This paper introduces the parallel pipeline as a method to reduce pressure ripples in tluid pipeline, and confirms the usefulness of it in reducing the pressure ripples as compared with the fluid pipeline with a accumulator using AMESim(Advanced Modeling Environment for Simulations) Software.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.48 no.6
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• pp.294-300
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• 1999

There is a growing interest in hybrid electric vehicles due to environmental concerns. Recent efforts are directed toward developing an improved main component systems for the hybrid electric vehicle applications. Soon after the introduction of electric starter for internal combustion engine early this century, despite being energy efficient and nonpolluting, electric vehicle lost the battle completly to internal combustion engine due to its limited range and inferior performance. Hybrid Electric vehicles offer the most promising solutions to reduce the emission of vehicles. This paper describes a method for cost reduction estimation of parallel hybrid electric vehicle. We used a cost reduction structure that consisted of five major subsystems (three-type and two-type motor) for parallel hybrid electric vehicle. Especially, we estimated the potential for cost reductions in parallel hybrid electric vehicle as a function of time using the learning curve. Also, we estimated the potentials of cost by depreciation.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.7
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• pp.553-564
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• 1990

The co-efficient matrix of linear second-order partial differential equations in the general form is partitioned with (n-1)x(n-1) submartices and is transformed into the block tridiagonal system. Then the cyclic odd-even reduction technique is applied to this system with the large-grain data granularity and the block cyclic reduction algorithm to solve unknown vectors of this system is created. But this block cyclic reduction technique is not suitable for the parallel processing system because of its parallelism chanigng at every computing stages. So a new algorithm for solving linear second-order partical differential equations is presentes by the block cyclic reduction technique which is modified in order to keep its parallelism constant, and to reduce gteatly its execution time. Both of these algoriths are compared and studied.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.3
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• pp.50-58
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• 2013

In this paper, parallel decimal fixed-point multiplier which uses the limited range of Singed-Digit number encoding and the reduction step is proposed. The partial products are generated without carry propagation delay by encoding a multiplicand and a multiplier to the limited range of SD number. With the limited range of SD number, the proposed multiplier can improve the partial product reduction step by increasing the number of possible operands for multi-operand SD addition. In order to estimate the proposed parallel decimal multiplier, synthesis is implemented using Design Compiler with SMIC 180nm CMOS technology library. Synthesis results show that the delay of proposed parallel decimal multiplier is reduced by 4.3% and the area by 5.3%, compared to the existing SD parallel decimal multiplier. Despite of the slightly increased delay and area of partial product generation step, the total delay and area are reduced since the partial product reduction step takes the most proportion.