• 제목/요약/키워드: Parallel pipeline

검색결과 172건 처리시간 0.024초

맵리듀스를 이용한 정렬 기반의 데이터 큐브 분산 병렬 계산 알고리즘 (Sort-Based Distributed Parallel Data Cube Computation Algorithm using MapReduce)

  • 이수안;김진호
    • 전자공학회논문지
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    • 제49권9호
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    • pp.196-204
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    • 2012
  • 최근 많은 응용 분야에서 대규모 데이터에 대해 온라인 다차원 분석(OLAP)을 사용하고 있다. 다차원 데이터 큐브는 OLAP 분석에서 핵심 도구로 여긴다. 본 논문에서는 맵리듀스 분산 병렬 처리를 이용하여 효율적으로 데이터 큐브를 계산하는 방법을 연구하고자 한다. 이를 위해, 맵리듀스 프레임워크에서 데이터 큐브 계산 방법으로 잘 알려진 PipeSort 알고리즘을 구현하는 효율적인 방법에 대해서 살펴본다. PipeSort는 데이터 큐브의 한 큐보이드에서 동일한 정렬 순서를 갖는 여러 큐보이드를 한 파이프라인으로 한꺼번에 계산하는 효율적인 방식이다. 이 논문에서는 맵리듀스 프레임워크에서 PipeSort의 파이프라인을 구현한 네 가지 방법을 20대의 서버에서 수행하였다. 실험 결과를 보면, 고차원 데이터에 대해서는 PipeMap-NoReduce 알고리즘이 우수한 성능을 보였으며, 저차원 데이터에 대해서는 Post-Pipe 알고리즘이 더 우수함을 보였다.

삼항 기약다항식을 위한 효율적인 Shifted Polynomial Basis 비트-병렬 곱셈기 (Efficient Bit-Parallel Shifted Polynomial Basis Multipliers for All Irreducible Trinomial)

  • 장남수;김창한;홍석희;박영호
    • 정보보호학회논문지
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    • 제19권2호
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    • pp.49-61
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    • 2009
  • 유한체 연산중에서 곱셈 연산은 중요한 연산중 하나이다. 또한, 최근에 Fan과 Dai는 이진체 곱셈기의 효율성을 개선하기 위하여 Shifted Polynomial Basis(SPB)와 이를 이용한 non-pipeline 비트-병렬 곱셈기를 제안하였다. 본 논문에서는 삼항 기약다항식 $x^{n}+x^{k}+1$에 의하여 정의된 $F_{2^n}$ 위에서의 새로운 SPB 곱셈기 type I과 type II를 제안한다. 제안하는 type I 곱셈기는 기존의 SPB 곱셈기에 비하여 시간 및 공간 복잡도면에서 모두 효율적이다. 그리고 type II 곱셈기는 제안하는 type I 곱셈기를 포함하여 기존의 모든 결과보다 작은 공간 복잡도를 가진다. 그러나 type II 곱셈기의 시간 복잡도는 n과 k에 따라 최대 1 XOR time-delay 증가한다.

위상간섭을 이용한 사축식 액셜 피스톤 펌프의 압력 맥동 감소 (A Reduction in Pressure Ripples of Axial Piston Pumps of Bent Axis by Phase Interface)

  • 김경훈;박경석;장주섭;김봉환;이규원;손권;신민호
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2003년도 춘계학술대회 논문집
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    • pp.1261-1265
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    • 2003
  • Axial piston pumps of bent axis have been commonly used in hydraulic systems because of high pressure level. best efficiency, low shear force on pistons and low operating costs. The other side, they have a few demerits like that they have the relatively high number of moving parts and more discharge pressure ripples. Especially, the discharge pressure ripples bring about vibrations and noises in hydraulic system components such as connecting pipes and control valves, so that these deteriorate the stability and accuracy of the systems. Therefore, the hydraulic systems having the axial piston pumps of bent axis require the methods to reduce the discharge pressure ripples. So, the purpose of this paper is to reduce the discharge pressure ripples by the phase interference of pressure wave and to develope the analysis model of the pumps to predict the discharge pressure ripples. In this paper, the analysis model of the axial piston pumps of bent axis was developed using the AMESim software, and the reliability of that was verified by the comparison with the experimental results. The hydraulic pipeline with a parallel line was used as the method to generate the phase interference of pressure wave. the dynamics characteristics of the hydraulic pipeline with a parallel line were analyzed by a transfer matrix method. the usefulness of the phase interference of pressure wave was investigated through the experiment and simulation. The results from the experiment and simulation said that the phase interference of pressure wave by the hydraulic pipeline with a paralle linel could reduce the discharge pressure wave of the pump well. The analysis model of the axial piston pumps of bent axis developed in this paper and the method of the phase interference by the hydraulic pipeline with a parallel line are expected to be helpful to achieve the design of the pump and to reduce the discharge pressure wave of the pump effectively.

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착유시설 형태에 따른 착유 노동생산성에 관한 연구 (Cows per Man-Hour(CMPH) based on Time and Motion Studies for various Milking Systems)

  • 정태영;김형화;김동일;이정호;이홍표;김종민;이연섭
    • 한국축산시설환경학회지
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    • 제3권2호
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    • pp.87-95
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    • 1997
  • This study was peformed to compare work routine time and performance of milking systems by measuring motion and time in milking procedure. Data were collected from thirteen dairy farms among which milking was done by bucket in two farms, by pipelines in three, by tandem parlors in four including one remodeled side-opening, by herringborn parlors in three and by a parallel milking parlor. Recording time and motion for milking parlor. Recording time and motion for milking procedure was performed by stopwatch and notebook computer. Work routine elements were recorded and calculated into cows milked per-man-hour(CMPH). The results are as follows : Average milking time per cow(MTPC) in bucket and pipeline milking systems usually installed in cow stall were 442.7 and 395.8 seconds, respectively. And average CMPH of bucket and pipeline milking system were 144.5, 303.3, 272.5 and 380.3 seconds, respectively. And CMPH of tandem, herringbone, parallel and modified side-opening systems were 24.9, 11.9, 13.2 and 9.5 heads, respectively. CMPH was the highest in the tandem milking system and the lowest in the bucket milking facilities. CMPH, when milked in a parlor resulted in high value compared with bucket or pipeline milking systems installed in cow stable. They showed considerably low CMPH compared with the results of other countries. The reason why so low CMPH could be derived from type and mechanization of facilities and equipment, operator's ability, number of operator, idle time and milking procedure.

저전력 파이프라인 병렬 누적기를 사용한 직접 디지털 주파수 합성기 (A Direct Digital Frequency Synthesizer Using A Low Power Pipelined Parallel Accumulator)

  • 양병도;김이섭
    • 대한전자공학회논문지SD
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    • 제40권5호
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    • pp.361-368
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    • 2003
  • 저전력 파이프라인 병렬 누적기를 사용한 새로운 고속 직접 디지털 주파수 합성기가 제안되었다. 제안된 파이프라인 병렬 누적기는 속도 향상과 전력 소모 감소를 위하여 파이프라인과 병렬 기법 모두를 사용한다. 같은 처리 속도를 가지는 4 파이프라인 누적기와 4 병렬 누적기에 비하여 2 파이프라인 2 병렬 누적기는 66%와 69%의 전력만을 소모한다 제안된 누적기는 더 낮은 클럭 주파수에서 더 작은 면적과 더 적은 전력을 소모하면서 같은 속도를 얻을 수 있다. 3.3V전원의 0.35um CMOS 공정을 사용하여 모든 회로의 모의 실험과 제작이 수행되었다.

내용을 고려한 무방향 네트워크의 신뢰도 계산 (Reliability Evaluation of a Capacitated Two-Terminal Network)

  • 최명호;윤덕균
    • 산업경영시스템학회지
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    • 제12권20호
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    • pp.47-53
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    • 1989
  • This paper presents an algorithm CAPFACT to evaluate the reliability of a capacitated two terminal network such as a communication network, a power distribution network, and a pipeline network. The network is good(working) if and only if it is possible to transmit successfully the required system capacity from one specified terminal to the other. This paper defines new Capacitated series-parallel reduction to be applied to a series-parallel structure of the network. New Capacitated factoring method is applied to a non-series-parallel structure. The method is based on the factoring theorem given by Agrawal and Barlow. According to the existing studies on the reliability evaluation of the network that the capacity is not considered, the factoring method using reduction is efficient. The CAPFACT is more efficient than Aggarwal algorithm which enumerated and combined the paths. The efficiency is proved by the result of testing the number of operations and cpu time on FORTRAN compiler of VAX-11/780 at Hanyang University.

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계층화 모션 추정법과 병렬처리 기반의 차량 움직임 측정 알고리즘 개발 및 검증1) (Design and Verification of Algorithms for the Motion Detection of Vehicles using Hierarchical Motion Estimation and Parallel Processing)

  • 강경훈;심현진;이은숙;정성태;남궁문;금기정;이상설
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 하계종합학술대회 논문집(4)
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    • pp.21-24
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    • 2002
  • This paper presents a new method for the motion detection of vehicles using hierarchical motion estimation and parallel processing. It captures the road image by using a CMOS sensor. It divides the captured image into small blocks and detects the motion of each block by using a block-matching method which is based on a hierarchical motion estimation and parallel processing for the real-time processing. The parallelism is achieved by using the pipeline and the data flow technique. The proposed method has been implemented with an embedded system. Experimental results show that the proposed method detects the motion of vehicles in real-time.

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다중 컴퓨터 시스템을 이용한 최적화 신경회로망의 최적 병렬구현 (Optimal Parallel Implementation of an Optimization Neural Network by Using a Multicomputer System)

  • 김진호;최흥문
    • 전자공학회논문지B
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    • 제28B권12호
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    • pp.75-82
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    • 1991
  • We proposed an optimal parallel implementation of an optimization neural network with linear increase of speedup by using multicomputer system and presented performance analysis model of the system. We extracted the temporal-and the spatial-parallelism from the optimization neural network and constructed a parallel pipeline processing model using the parallelism in order to achieve the maximum speedup and efficiency on the CSP architecture. The results of the experiments for the TSP using the Transputer system, show that the proposed system gives linear increase of speedup proportional to the size of the optimization neural network for more than 140 neurons, and we can have more than 98% of effeciency upto 16-node system.

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실시간 멀티미디어 시스템을 위한 새로운 고속 병렬곱셈기 (New High Speed Parallel Multiplier for Real Time Multimedia Systems)

  • 조병록;이명옥
    • 정보처리학회논문지A
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    • 제10A권6호
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    • pp.671-676
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    • 2003
  • 본 논문에서는 고속 병렬 곱셈기에서 속도향상을 위해 부분 곱을 가산하는 과정에 구성되는 CSA(Carry Select Adder) 트리에 새로운 압축기를 적용한 새로운 첫 번째 부분 곱가산(First Partial Product Addition : FPA)를 제안하여 기존의 전가산기를 이용한 병렬가산기보다 부분곱을 계산하는 속도를 약 20% 개선할 수 있게 했다. 새로운 회로는 새로운 FPA 구조를 사용하여 최종 합 CLA 비트를 N/2로 줄인다. 2.5v 0.25um CMOS 기술을 이용하여 제작된 16${\times}$16 곱셈기는 5.14nS의 곱셈 고속을 얻었다. 이 곱셈기의 구조는 파이프라인 설계에 용이하며 고성능을 낸다.

CUDA based parallel design of a shot change detection algorithm using frame segmentation and object movement

  • Kim, Seung-Hyun;Lee, Joon-Goo;Hwang, Doo-Sung
    • 한국컴퓨터정보학회논문지
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    • 제20권7호
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    • pp.9-16
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    • 2015
  • This paper proposes the parallel design of a shot change detection algorithm using frame segmentation and moving blocks. In the proposed approach, the high parallel processing components, such as frame histogram calculation, block histogram calculation, Otsu threshold setting function, frame moving operation, and block histogram comparison, are designed in parallel for NVIDIA GPU. In order to minimize memory access delay time and guarantee fast computation, the output of a GPU kernel becomes the input data of another kernel in a pipeline way using the shared memory of GPU. In addition, the optimal sizes of CUDA processing blocks and threads are estimated through the prior experiments. In the experimental test of the proposed shot change detection algorithm, the detection rate of the GPU based parallel algorithm is the same as that of the CPU based algorithm, but the average of processing time speeds up about 6~8 times.