• Proceedings of the KIEE Conference
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• 2005.07a
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• pp.93-95
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• 2005

Coupling capacitor voltage transformers (CCVT) are widely used in high voltage power systems to obtain standard low voltage signal for protective relaying and measuring instruments. To obtain high accuracy, capacitances and inductances are tuned to the power system frequency, making a parallel resonant circuit. When no fault occurs, no distortion of the secondary voltage is generated. However, when a fault occurs, harmonics generated break the resonance between capacitances and inductance, which generates the distortion of the secondary voltage. This paper proposes an algorithm for compensating the secondary voltage of the CCVT. With the values of the secondary voltage of the CCVT, the secondary currents, the primary currents and the voltages across the capacitors and inductor are calculated. Test results indicate that the proposed algorithm can compensate the distorted secondary voltage of the CCVT, and is irrespective of the fault distance, the fault inception angle and the burden.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.9
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• pp.856-862
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• 2005

A flux-lock type SFCL consists of two coils, which are wound in parallel each other through an iron core, and a HTSC thin film connected in series with coil 2. If the current of the HTSC thin film exceeds its critical current by the fault accident, the resistance generated of the HTSC thin film, and thereby the fault current can be limited by the impedance of the flux-lock type SFCL. The amplitude of fault current can be set by the impedance of the flux-lock type SFCL. In this paper, we investigated the variance of the limiting current due to the ratio of inductances between coil 1 and coil 2 in the flux-lock type SFCL through the computer simulations and short circuit tests. In addition, both the simulation results and experimental ones were compared each other. From the comparison of both the results, the simulation results agreed well with the experimental ones.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.10
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• pp.186-194
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• 1996

The SliM (sliding memory plane) array processor has been proposed to alleviate disadvantages of existing mesh-connected SIMD(single instruction stream- multiple data streams) array processors, such as the inter-PE(processing element) communication overhead, the data I/O overhead and complicated interconnections. This paper presents the deisgn and implementation of SliM image processor ASIC (application specific integrated circuit) chip consisting of mesh connected 5 X 5 PE. The PE architecture implemented here is quite different from the originally proposed PE. We have performed the front-end design, such as VHDL (VHSIC hardware description language)modeling, logic synthesis and simulation, and have doen the back-end design procedure. The SliM ASIC chip used the VTI 0.8$\mu$m standard cell library (v8r4.4) has 55,255 gates and twenty-five 128 X 9 bit SRAM modules. The chip has the 326.71 X 313.24mil$^{2}$ die size and is packed using the 144 pin MQFP. The chip operates perfectly at 25 MHz and gives 625 MIPS. For performance evaluation, we developed parallel algorithms and the performance results showed improvement compared with existing image processors.

• Aerospace Engineering and Technology
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• v.11 no.2
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• pp.182-194
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• 2012

To develop a liquid rocket engine with high reliability and safety under constraints of limited time and budget an optimal diagnosis system for the engine needs to be developed in parallel with the development of the engine. This paper is intended to set a development direction of the diagnosis system for the liquid rocket engine through the literature survey and addresses possible engine defects, characteristics of parameters for diagnosis and diagnostic methods including real-time diagnosis, post-test/post-flight diagnosis, fault detection method, parameter circuit method and test diagnosis. In addition tasks to be performed in the design and operation phases of the engine and foreign application case of engine diagnosis are presented.

• The Transactions of the Korean Institute of Power Electronics
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• v.5 no.5
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• pp.484-492
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• 2000

In this paper, a voltage compensator with harmonic current compensating capability is studied and its compensating characteristics are analyzed. Like the hybrid active power filter, the proposed system is composed of parallel LC passive filter and series PWM converter connected to power line through series transformer. It is shown that the compensation of harmonic current generated due to nonlinear loads such as diode rectifier and instantaneous voltage compensation of the source are performed through the proposed compensating system. The operating principle of the proposed system is described through a single-phase equivalent circuit and the control strategy is suggested on the d-q rotating reference frame of the 3-phase system. Also, experiment is carried out to verify compensating characteristics of the proposed system.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.13 no.2
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• pp.160-170
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• 1988

This paper describes the outboard NIU(Network Interface Unit) using microprocessor and the hardware and software of concentrator for constructing star typed LAN(Local Area Network) based on token ring method. The NIU adapter can adapter up to four parallel and serial typed terminals. Because it has PAD function on input output data, any type of terminals can be adapted. Since the concentrator has logical switching circuit which enables data to bypass the faulted NIU adapter, this network prevents communication break. When user transmits and receives data, the concentrator constructs star typed LAN which connct both transmitting and receiving sides. A s result, this network eliminated ring latency time in other NIU exculding transmitting and receiving NIU. So the throughput of this LAN is increased. Because this LAN system consists of several modultes according to it's function, the expansion of function or the modification of method is easy.

• Proceedings of the KIEE Conference
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• 2001.07c
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• pp.1603-1605
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• 2001

Eight 300kJ modularized capacitor-banks have been constructed. These modules have been installed and assembled to make a 2.4MJ pulse power system (PPS). This 2.4MJ PPS was developed to be used as a driver of an electrothermal-chemical (ETC) gun. Each capacitor bank has six 22kV, 50kJ capacitors connected in parallel. A triggered vacuum switch (TVS-43) was adopted as a main pulse power-closing switch in each module. The module also contains a crowbar circuit made of three high-voltage diode-stacks, a multi-tap inductor and an energy-dumping resistor. Various current shapes have been formed by a sequential firing of multiple capacitor banks. Resistive dummy load has been used and various combinations of experimental parameters, such as charging voltage, trigger time and inductance, were tested to make flexible current shapes.

• Transactions on Electrical and Electronic Materials
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• v.11 no.3
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• pp.93-105
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• 2010

Complementary metal-oxide-semiconductor (CMOS) technology scaling has been a main key for continuous progress in silicon-based semiconductor industry over the past three decades. However, as the technology scaling enters nanometer regime, CMOS devices are facing many serious problems such as increased leakage currents, difficulty on increase of on-current, large parameter variations, low reliability and yield, increase in manufacturing cost, and etc. To sustain the historical improvements, various innovations in CMOS materials and device structures have been researched and introduced. In parallel with those researches, various new nanoelectronic devices, so called "Beyond CMOS Devices," are actively being investigated and researched to supplement or possibly replace ultimately scaled conventional CMOS devices. While those nanoelectronic devices offer ultra-high density system integration, they are still in a premature stage having many critical issues such as high variations and deteriorated reliability. The practical realization of those promising technologies requires extensive researches from device to system architecture level. In this paper, the current researches and challenges on nanoelectronics are reviewed and critical tasks are summarized from device level to circuit design/CAD domain to better prepare for the forthcoming technologies.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.411-412
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• 2008

The high performance 94 GHz MMIC(Monolithic Micro-wave Integrated Circuit) single balanced mixer was designed and fabricated, using MHEMT structure based diodes and a CPW(Coplanar Waveguide) tandem coupler. A novel single-balanced structure of diode mixer is proposed in this work, where a 3-dB tandem coupler with two section of parallel-coupled line. Implemented air-bridge crossover structures achieve wide frequency operation and the fabricated mixer exhibits excellent LO-RF isolation, larger than 30 dB, in the 5 GHz bandwidth of 91-96 GHz. A good conversion loss of 7.4 dB is measured at 94 GHz. The proposed MHEMT-based diode mixer shows superior LO-RF isolation and conversion loss to those of the W-band mixers reported to date.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.4
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• pp.35-41
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• 2000

In this paper, the multiplicative algorithm of two polynomals over finite field GF(2$^{m}$ ) is presented. The proposed algorithm permits an efficient realization of the parallel multiplication using iterative arrays. At the same time, it permits high-speed operation. This multiplier is consisted of three operation unit: multiplicative operation unit, the modular operation unit, the primitive irreducible operation unit. The multiplicative operation unit is composed of AND gate, X-OR gate and multiplexer. The modular operation unit is constructed by AND gate, X-OR gate. Also, an efficient pipeline form of the proposed multiplication scheme is introduced. All multipliers obtained have low circuit complexity permitting high-speed operation and interconnection of the cells are regular, well-suited for VLSI realization.