• Title/Summary/Keyword: Parallel circuit

Search Result 919, Processing Time 0.023 seconds

A Study on the Parallel Routing in Hybrid Optical Networks-on-Chip (하이브리드 광학 네트워크-온-칩에서 병렬 라우팅에 관한 연구)

  • Seo, Jung-Tack;Hwang, Yong-Joong;Han, Tae-Hee
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.48 no.8
    • /
    • pp.25-32
    • /
    • 2011
  • Networks-on-chip (NoC) is emerging as a key technology to overcome severe bus traffics in ever-increasing complexity of the Multiprocessor systems-on-chip (MPSoC); however traditional electrical interconnection based NoC architecture would be faced with technical limits of bandwidth and power consumptions in the near future. In order to cope with these problems, a hybrid optical NoC architecture which use both electrical interconnects and optical interconnects together, has been widely investigated. In the hybrid optical NoCs, wormhole switching and simple deterministic X-Y routing are used for the electrical interconnections which is responsible for the setup of routing path and optical router to transmit optical data through optical interconnects. Optical NoC uses circuit switching method to send payload data by preset paths and routers. However, conventional hybrid optical NoC has a drawback that concurrent transmissions are not allowed. Therefore, performance improvement is limited. In this paper, we propose a new routing algorithm that uses circuit switching and adaptive algorithm for the electrical interconnections to transmit data using multiple paths simultaneously. We also propose an efficient method to prevent livelock problems. Experimental results show up to 60% throughput improvement compared to a hybrid optical NoC and 65% power reduction compared to an electrical NoC.

A 65-nm CMOS Low-Power Baseband Circuit with 7-Channel Cutoff Frequency and 40-dB Gain Range for LTE-Advanced SAW-Less RF Transmitters (LTE-Advanced SAW-Less 송신기용 7개 채널 차단 주파수 및 40-dB 이득범위를 제공하는 65-nm CMOS 저전력 기저대역회로 설계에 관한 연구)

  • Kim, Sung-Hwan;Kim, Chang-Wan
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.17 no.3
    • /
    • pp.678-684
    • /
    • 2013
  • This paper describes a low-power baseband circuit for SAW-less LTE-Advanced transmitters. The proposed transmitter baseband circuit consists of a 2nd-order Tow-Thomas type active RC-LPF and a 1st-order passive RC LPF. It can provide a 7 multi-channel cut-off frequencies and wide gain control range of -41 dB ~ 0 dB with a 1-dB step. The proposed 2nd-order active RC-LPF adopts an op-amp in which three other sub-op amps are in parallel connected to reduce DC current for different cutoff frequency. In addition, each sub-op amp adopts both Miller and feed-forward phase compensation method to achieve an UGBW of more than 1-GHz with a small DC power consumption. The proposed baseband circuit is implemented in 65-nm CMOS technology, consuming DC power from 6.3 mW to 24.1 mW from a 1.2V supply voltage for each different cut-off frequency.

Measuring Circuit Design of RI-Gauge for Compaction Control (성토시공관리용 방사성 동위원소 이용계기의 측정회로설계)

  • Kil, Gyung-Suk;Song, Jae-Yong;Kim, Ki-Joon;Whang, Joo-Ho;Song, Jung-Ho
    • Journal of Sensor Science and Technology
    • /
    • v.6 no.5
    • /
    • pp.385-391
    • /
    • 1997
  • An objection of this study is to develop a measuring circuit of a gauge using radioisotope for compaction control. The gauge developed in this study makes use of radioisotope with the activity exempted from domestic atomic law and consists of measuring circuits for gamma-rays and thermal neutrons, a high voltage supply unit, and a microprocessor. To obtain meaningful numbers of pulse counts, parallel five and two circuits are provided for gamma-rays and thermal neutrons, respectively. Being simple in electrical characteristics of G-M detector for gamma-rays, pulses are counted through only a shaping circuit. Very small pulses generated from He- 3 proportional detector for thermal neutrons are amplified to the maximum of 50 [dB] and a window comparator accepts only pulses with meaning. To minimize effects of natural environmental radiation and electrical noise, circuits are electrostatically shielded and pulses made by ripples are eliminated by taking frequency of high voltage supplied to the circuit and pulse height of ripples into consideration. One-chip microprocessor is applied to process various counts, results are stored and the gauage is made capable to communicate with PC. Enough and meaningful numbers of pulses are counted with the prototype gauage for compaction control.

  • PDF

Comparison of Main Circuit Type Characteristics of LED Driver for Output Ripple Reduction (출력 리플 저감을 위한 LED 드라이버의 주회로 방식 특성 비교)

  • Park, Dae-Su;Kim, Tae-Kyung;Oh, Sung-Chul
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.20 no.3
    • /
    • pp.491-499
    • /
    • 2019
  • Recently, there has been increasing demand for power quality in power supply devices. The IEC 61000-3-2 standard requires that the AC / DC power supply for lighting meet the specifications for the power factor (PF) and total waveform distortion (THD). In addition, advanced countries in Europe are regulating the ripple rate as 15 ~ 30% for the flicker phenomenon caused by the change in the amount of foot energy due to the change in current of the output terminal. Therefore, domestic standards and regulations are being updated. This study adopted the Flyback converter to satisfy the PFC standard, and has the circuit first and second insulation function. To reduce the low frequency ripple of the LED current, Flyback, Coupled Inductor, LC parallel resonance filter, LLC resonance filter, and Cuk were simulated by PSIM to mimic each LED driving circuit. A coupled LC resonant circuit with a coupled inductor on the primary side and LC resonance on the secondary side was also proposed for output side ripple reduction.

Development of PC-based and portable high speed impedance analyzer for biosensor (바이오센서를 위한 PC 기반의 휴대용 고속 임피던스 분석기 개발)

  • Kim, Gi-Ryon;Kim, Gwang-Nyeon;Heo, Seung-Deok;Lee, Seung-Hoon;Choi, Byeong-Cheol;Kim, Cheol-Han;Jeon, Gye-Rok;Jung, Dong-Keun
    • Journal of Sensor Science and Technology
    • /
    • v.14 no.1
    • /
    • pp.33-41
    • /
    • 2005
  • For more convenient electrode-electrolyte interface impedance analysis in biosensor, a stand-alone impedance measurement system is required. In our study, we developed a PC-based portable system to analyze impedance of the electrochemical cell using microprocessor. The devised system consists of signal generator, programmable amplifiers, A/D converter, low pass filter, potentiostat, I/V converter, microprocessor, and PC interface. As a microprocessor, PIC16F877 which has the processing speed of 5 MIPS was used. For data acquisition, the sampling rate at 40 k samples/sec, resolution of 12 bit is used. RS-232 with 115.2 kbps speed is used for the PC communication. The square wave was used as stimuli signal for impedance analysis and voltage-controlled current measurement method of three-electrode-method were adopted. Acquired voltage and current data are calculated to multifrequency impedance signal after Fourier transform. To evaluate the implemented system, we set up the dummy cell as equivalent circuit of which was composed of resistor, parallel circuit of capacitor and resistor connected in parallel and measured the impedance of the dummy cell; the result showed that there exist accuracy within 5 % errors and reproduction within 1 % errors compared to output of Hioki LCR tester and HP impedance analyzer as a standard product. These results imply that it is possible to analyze electrode-electrolyte interface impedance quantitatively in biosensor and to implement the more portable high speed impedance analysis system compared to existing systems.

A Study on the Airflow Distribution in the Diagonal Ventilation Circuit for the Design of a High Level Radioactive Waste Repository (고준위 방사성 폐기물 처분장 설계를 위한 Diagonal 환기 회로 내 공기량 분배에 관한 연구)

  • Hwang, In-Phil;Choi, Heui-Joo;Roh, Jang-Hoon;Kim, Jin
    • Tunnel and Underground Space
    • /
    • v.22 no.3
    • /
    • pp.173-180
    • /
    • 2012
  • In this study, diagonal ventilation circuits that are advantageous in air flow direction control were studied. Based on the results of the study, it could be seen that air volumes in diagonal ventilation circuits could also be calculated using numerical formulas or programs if the air volumes and air flow directions to be infused into diagonal branches are determined in advance as with other serial/parallel circuits. To apply the results, design plans for high level radioactive waste repositories applied with diagonal ventilation circuits and parallel ventilation circuits. To compared the each design plans and obtain expected operation results, ventilation network simulations were conducted through the Ventsim program which is a ventilation networking program. Based on the results, in the case of diagonal repositories that was expected to cause great increases in resistance, fan pressure was 1570 pa, total flux was 84 $m^3/s$, fan efficiency was 76.4%, fan power consumption was 181.2 kW and annual fan operating costs were 178,710,838 and thus maximum around 8% differences were shown in pressure and flux values and a difference of around 1.5% was shown in terms of operating costs.

Propagation Characteristic in Parallel Plate Waveguide with Dielectric Layer Having Periodic Metal Strip Pattern (주기적인 금속 스트립 패턴을 갖는 유전체 층이 놓인 평행판 도파관내에서의 전파 특성)

  • Cho, Jung-Rae;Kim, Dong-Seok;Lee, Kee-Oh;Ryu, Sang-Chul;Park, Dong-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.20 no.1
    • /
    • pp.45-51
    • /
    • 2009
  • The propagation characteristics in parallel plate waveguide with dielectric layer having periodic metal strip pattern are investigated. PIN diode ON/OFF states are regarded as the short and open circuit, respectively, in the simulation using CST's MWS. The $11.25^{\circ}$, $22.5^{\circ}$, and $45^{\circ}$ layers which can be used for X-band 4-bit Radant lens phase shifter, are designed. The simulated results for each dielectric layer are $11.28^{\circ}$, $23.2^{\circ}$, and $46.22^{\circ}$, respectively. Also, the equivalent circuit of each layer at the operating band is realized and simulated using Agilent's ADS. The ADS simulated results are compared with the MWS simulated ones. Measured differential phase shills at the center frequency are $9.6^{\circ}$, $22.4^{\circ}$, and $43^{\circ}$, respectively.

High Conversion Gain and Isolation Characteristic V-band Quadruple Sub-harmonic Mixer (고 변환이득 및 격리 특성의 V-band용 4체배 Sub-harmonic Mixer)

  • Uhm, Won-Young;Sul, Woo-Suk;Han, Hyo-Jong;Kim, Sung-Chan;Lee, Han-Shin;An, Dan;Kim, Sam-Dong;Park, Hyung-Moo;Rhee, Jin-Koo
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.40 no.7
    • /
    • pp.293-299
    • /
    • 2003
  • In this paper, we have proposed a high conversion and isolation characteristic V-band quadruple sub-harmonic mixer monolithic circuit which is designed and fabricated for the millimeter wave down converter applications. While most of the sub-harmonic mixers use a half of fundamental frequency, we adopt a quarter of the fundamental frequency. The proposed circuit is based on a sub-harmonic mixer with APDP(anti-parallel diode pair) and the 0.1 ${\mu}{\textrm}{m}$ PHEMT's (pseudomorphic high electron mobility transistors). Lumped elements at IF port provide better selectivity of IF frequency and increase isolation. Maximum conversion gain of 0.8 ㏈ at a LO frequency of 14.5㎓ and at a RF frequency of 60.4 ㎓ is measured. Both LO-to-RF and LO-to-IF isolations are higher than 50 ㏈. The conversion gain and isolation characteristic are the best performances among the reported quadruple sub-harmonic mixer operating in the V-band millimeter wave frequency thus far.

A Study on the Resistve Switching Characteristic of Parallel Memristive Circuit of Lithium Ion Based Memristor and Capacitor (리튬 이온 기반 멤리스터 커패시터 병렬 구조의 저항변화 특성 연구)

  • Kang, Seung Hyun;Lee, Hong-Sub
    • Journal of the Microelectronics and Packaging Society
    • /
    • v.28 no.4
    • /
    • pp.41-45
    • /
    • 2021
  • In this study, in order to secure the high reliability of the memristor, we adopted a patterned lithium filament seed layer as the main agent for resistive switching (RS) characteristic on the 30 nm thick ZrO2 thin film at the device manufacturing stage. Lithium filament seed layer with a thickness of 5 nm and an area of 5 ㎛ × 5 ㎛ were formed on the ZrO2 thin film, and various electrode areas were applied to investigate the effect of capacitance on filament type memristive behavior in the parallel memristive circuit of memristor and capacitor. The RS characteristics were measured in the samples before and after 250℃ post-annealing for lithium metal diffusion. In the case of conductive filaments formed by thermal diffusion (post-annealed sample), it was not available to control the filament by applying voltage, and the other hand, the as-deposited sample showed the reversible RS characteristics by the formation and rupture of filaments. Finally, via the comparison of the RS characteristics according to the electrode area, it was confirmed that capacitance is an important factor for the formation and rupture of filaments.

On a High-speed Implementation of LILI-II Stream Cipher (LILI-II 스트림 암호의 고속화 구현에 관한 연구)

  • 이훈재;문상재
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.29 no.8C
    • /
    • pp.1210-1217
    • /
    • 2004
  • LILI-II stream cipher is an upgraded version of the LILI-128, one of candidates in NESSIE. Since the algorithm is a clock-controlled, the speed of the keystream data is degraded structurally in a clock-synchronized hardware logic design. Accordingly, this paper proposes a 4-bit parallel LFSR, where each register bit includes four variable data routines for feedback or shifting within the LFSR. furthermore, the timing of the proposed design is simulated using a Max+plus II from the ALTERA Co., the logic circuit is implemented for an FPGA device (EPF10K20RC240-3), and apply to the Lucent ASIC device (LV160C, 0.13${\mu}{\textrm}{m}$ CMOS & 1.5v technology), and it could achieve a throughput of about 500 Mbps with a 0.13${\mu}{\textrm}{m}$ semiconductor for the maximum path delay below 1.8㎱. Finally, we propose the m-parallel implementation of LILI-II, throughput with 4, 8 or 16 Gbps (m=8, 16 or 32).