• 제목/요약/키워드: Parallel circuit

검색결과 919건 처리시간 0.026초

다중 다공판 시스템의 흡음계수 계산에 있어서 전기음향등가회로법의 오류 (The Error Involved in the Equivalent Electroacoustic Circuit Approach for the Estimation of the Absorption Coefficient of Multiple Layer Perforated Plate Systems)

  • 이동훈;권영필
    • 한국소음진동공학회:학술대회논문집
    • /
    • 한국소음진동공학회 2002년도 추계학술대회논문집
    • /
    • pp.890-895
    • /
    • 2002
  • The equivalent electroacoustic circuit approach has been conventionally used for estimating the absorption coefficient of a single layer perforated plate system. When the single layer system is extended to the multiple layer ones, however, it is found that an analogy error has been involved in the equivalent electroacoustic parallel circuit approach proposed by previous investigators. The analogy error is demonstrated by the corrected equivalent electroacoustic circuit approach in this study.

  • PDF

다중 다공판 시스템의 흡음계수 계산에 있어서 전기음향등가회로법의 오류 (The Error Involved in the Equivalent Electroacoustic Circuit Approach for the Estimation of the Absorption Coefficient of Multiple Layer Perforated Plate Systems)

  • Lee, Dong-Hoon;Kim, Wook;Kwon, Young-Pil
    • 한국소음진동공학회:학술대회논문집
    • /
    • 한국소음진동공학회 2002년도 추계학술대회논문초록집
    • /
    • pp.387.2-387
    • /
    • 2002
  • The equivalent electroacoustic circuit approach has been conventionally used for estimating the absorption coefficient of a single layer perforated plate system. When the single layer system is extended to the multiple layer ones, however, it is found that an analogy error has been involved in the equivalent electroacoustic parallel circuit approach proposed by previous researchers. The analogy error is demonstrated by the corrected equivalent electroacoustir circuit approach proposed en this study.

  • PDF

SCR 에 의한 직류회로차단기의 과부하차단특성개선 (A Study on DC Circuit Breaker using SCR Chung Hoo Park)

  • 박정후
    • 수산해양기술연구
    • /
    • 제14권2호
    • /
    • pp.89-95
    • /
    • 1978
  • A SCR static breaker was studied on the Resistive and inductive load, then on the overload break circuit using operational Amplifier. In this paper, the principal circuit required for forced commutation was voltage commutation by the introduction of a parallel Capacitor. The results obtained are follows; 1. In thecondition that the tima constant of R-C circuit is larger than the turn off time of SCR, the breaker has low transient phenomena and no recovery vol age. 2. By using OP Amplifier on the load circuit, overcurrent trip point will be able to adjust to the wide range of over current. 3. In the over current qrcuit, the power loss was reduced remarkably.

  • PDF

Analysis on Current Limiting Characteristics of Transformer Type SFCL with Additionally Coupled Circuit

  • Lim, Seung-Taek;Ko, Seok-Cheol;Lim, Sung-Hun
    • Journal of Electrical Engineering and Technology
    • /
    • 제13권2호
    • /
    • pp.533-539
    • /
    • 2018
  • In this paper, the transformer type superconducting fault current limiter (SFCL) with additionally coupled circuit was suggested and its peak fault current limiting characteristics due to the fault condition to affect the fault current were analyzed through the fault current limiting tests. The suggested transformer type SFCL is basically identical to the previous transformer type SFCL except for the additional coupled circuit. The additional coupled circuit, which consists of the magnetically coupled winding to the primary and the secondary windings together with another superconducting element and is connected in parallel with the secondary winding of the transformer type SFCL, is contributed to the peak fault current limiting operation for the larger transient fault current directly after the fault occurrence. To confirm the fault current limiting operation of the suggested SFCL, the fault current limiting tests of the suggested SFCL were performed and its effective peak fault current limiting characteristics were analyzed through the analysis on the electrical equivalent circuit.

SRM 구동을 위한 새로운 ZVT-PWM 컨버어터 (Novel Zero Voltage Transition PWM Converter for Switched Reluctance Motor Drives)

  • 김원호;김종수;조정구;임근희;김철우
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
    • /
    • 제48권8호
    • /
    • pp.455-460
    • /
    • 1999
  • A novel zero-voltage-transition (ZVT) PWM converter for switched reluctance motor (SRM) drives is proposed. A simple auxiliary circuit which consists of one active switch, one resonant inductor, and three diodes provides ZVS condition to all main switches and diodes allowing high frequency operation of the converter with high efficiency. The auxiliary circuit is placed in parallel with the main power flow path and thus it handles only a small fraction of the main power. So, the power rating of the auxiliary circuit can be very small (about 30% of main power). So, the auxiliary circuit can be realized with small power rating and low cost. Operation, features and characteristics of the proposed converter are illustrated and verified on a 1.5 kW, 50 kHz IGBT based (a MOSFET for the auxiliary with) experimental circuit.

  • PDF

A Study of a Simple PDP Driver Architecture using the Transformer Network

  • Kim, Woo-Sup;Shin, Jong-Won;Chae, Su-Yong;Hyun, Byung-Chul;Cho, Bo-Hyung
    • Journal of Power Electronics
    • /
    • 제8권2호
    • /
    • pp.148-155
    • /
    • 2008
  • In this paper, a cost-effective PDP driving circuit using the transformer network is proposed. Compared with the previous works, the half-bridge type energy recovery circuit recovers the reactive energy not to the capacitor but to the source. A single sustain board architecture removes the blocking switches which are placed on the discharge path in parallel, thus reducing the number of devices. A simple reset circuit generates the same waveforms as the previous approaches. The circuit configuration and modified driving waveforms are compared with the previous works. The validity of the proposed simplified driver is verified through tests using a 6-inch panel.

계층적인 구조를 갖는 고속 병렬 곱셈기 (A High Speed Parallel Multiplier with Hierarchical Architecture)

  • 진용선;정정화
    • 대한전자공학회논문지TE
    • /
    • 제37권3호
    • /
    • pp.6-15
    • /
    • 2000
  • 본 논문에서는 고속 4-2 compressor와 6-2 compressor 를 사용한 계층적인 구조를 갖는 병렬 곱셈기를 제안한다. 병렬곱셈기는 일반적으로 CSA 덧셈기를 사용한 부분곱 덧셈 트리 블록의 처리속도에 영향을 받는다. 따라서, 본 논문에서는 일반적인 CSA 덧셈기 회로보다 전달 지연시간을 감소시킨 고속 4-2 compressor와 6-2 compressor 회로를 제안한다. 또한, 제안하는 compressor를 사용하여 16×16 병렬곱셈기의 처리속도를 향상시키며 규칙적인 레이아웃을 할 수 있는 계층적 곱셈기 구조를 제안한다. 제안하는 4-2 compressor 회로를 SPICE 시뮬레이션 한 결과 기존의 4-2 compressor 회로에 비하여 전달지연 시간을 14% 감소시킬 수 있었다. 한편 제안하는 4-2 compressor와 6-2 compressor를 사용하여 16×16 비트 병렬곱셈기를 설계한 결과 일반 병렬곱셈기에 비하여 총 전달지연시간이 12% 이상 감소되었다

  • PDF

Implementation of Zero-Ripple Line Current Induction Cooker using Class-D Current-Source Resonant Inverter with Parallel-Load Network Parameters under Large-Signal Excitation

  • Ekkaravarodome, Chainarin;Thounthong, Phatiphat;Jirasereeamornkul, Kamon
    • Journal of Electrical Engineering and Technology
    • /
    • 제13권3호
    • /
    • pp.1251-1264
    • /
    • 2018
  • The systematic and effective design method of a Class-D current-source resonant inverter for use in an induction cooker with zero-ripple line current is presented. The design procedure is based on the principle of the Class-D current-source resonant inverter with a simplified load network model that is a parallel equivalent circuit. An induction load characterization is obtained from a large-signal excitation test-bench based on parallel load network, which is the key to an accurate design for the induction cooker system. Accordingly, the proposed scheme provides a systematic, precise, and feasible solution than the existing design method based on series-parallel load network under low-signal excitation. Moreover, a zero-ripple condition of utility-line input current is naturally preserved without any extra circuit or control. Meanwhile, a differential-mode input electromagnetic interference (EMI) filter can be eliminated, high power quality in utility-line can be obtained, and a standard-recovery diode of bridge-rectifier can be employed. The step-by-step design procedure explained with design example. The devices stress and power loss analysis of induction cooker with a parallel load network under large-signal excitation are described. A 2,500-W laboratory prototype was developed for $220-V_{rms}/50-Hz$ utility-line to verify the theoretical analysis. An efficiency of the prototype is 96% at full load.

New Three-Level PWM DC/DC Converter - Analysis, Design and Experiments

  • Lin, Bor-Ren;Chen, Chih-Chieh
    • Journal of Power Electronics
    • /
    • 제14권1호
    • /
    • pp.30-39
    • /
    • 2014
  • This paper studies a new three-level pulse-width modulation (PWM) resonant converter for high input voltage and high load current applications. In order to use high frequency power MOSFETs for high input voltage applications, a three-level DC converter with two clamped diodes and a flying capacitor is adopted in the proposed circuit. For high load current applications, the secondary sides of the proposed converter are connected in parallel to reduce the size of the magnetic core and copper windings and to decrease the current rating of the rectifier diodes. In order to share the load current and reduce the switch counts, three resonant converters with the same active switches are adopted in the proposed circuit. Two transformers with a series connection in the primary side and a parallel connection in the secondary side are adopted in each converter to balance the secondary side currents. To overcome the drawback of a wide range of switching frequencies in conventional series resonant converters, the duty cycle control is adopted in the proposed circuit to achieve zero current switching (ZCS) turn-off for the rectifier diodes and zero voltage switching (ZVS) turn-on for the active switches. Finally, experimental results are provided to verify the effectiveness of the proposed converter.

765 kV 송전선로에서의 이종 전압등급 병행 운전시의 유도현상 예측 및 실측 결과 (Prediction and Measurement of Induction Phenomena in the 765 kV Double Circuit Transmission Line operated with two voltage grades)

  • 곽주식;강연욱;심응보;전명렬;우정욱;방항권
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 2003년도 하계학술대회 논문집 A
    • /
    • pp.208-211
    • /
    • 2003
  • The western route of KEPCO's 765 kV transmission line has been tentatively operating as 345 kV voltage before commercial operation. KEPCO decided to operate the 765 kV line for commercial operation after completing the test operation of 765 kV substation in 2002. In the process of energizing the line as 765 kV voltage, double circuit transmission line will be operated with two voltage grades of 765 kV and 345 kV. As the earthing switches are installed on both ends of the line, electrostatic induction voltage and electromagnetic induction current were calculated prior to the line energizing in order to confirm the ratings. The induced voltage and current are important for the maintenance of the parallel circuit. This paper presents the simulation results of electrical phenomena such as electrostatic induction voltage and electromagnetic induction current from the parallel line. The transmission line was modeled by EMTP (Electro-Magnetic Transient Program). The simulation results were compared with the measured results at the field.

  • PDF