• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.5
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• pp.384-398
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• 1990

This paper compares and shows the characteristics of various PWM strategies used to generate pulse signals of voltage source inverter. We designed the inverter using PTR and constituted the variable speed drive (VSD) system. For each PWM strategy, acoustic noise level, line-to-line voltage and current waveform, and current harmonic spectrum are measured with respect to the VSD of induction motor. The Suboptimal PWM strategy showed the similar harmonic effects to those of the Optimal PWM strategy. In addition, the microprocessor application was available to the former. The TP PWM strategy was excellent in that it could reduce the CPU load and increase the output voltage since the strategy could control only two phase of the three.

• Proceedings of the KSR Conference
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• 1998.05a
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• pp.442-449
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• 1998

Since it is essential for traction motors to reduce size and weight to achieve given traction effort, they need high input voltage. But the lack of input voltage occurs periodically due to the characteristics of train system. Therefore traction inverters use over-modulation PWM to maximize inverter's voltage gain. On the other hand, IGBT inverters can use higher frequency twice than GTO ones, which resulted in the need for novel optimal synchronous PWM strategy. This paper suggests that linearly-compensated overmodulation/optimal synchronous PWM strategy and also the simulation results of the method for a real traction motor-intertia model are presented.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.36 no.9
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• pp.623-635
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• 1987

A new suboptimal PWM is proposed, intended particularly for the reduction of acoustic noise and harmonics of the output current in the inverter-fed induction motor drive system. This strategy is based of the Regular PWM and applied optimal techniqe. And it could solve a problem that computation time is very much when switching strategy is determined at the Optimal PWM. In case that the number of switching increases infinitely, this strategy could determine the switching pattern, and can realize Online, Real time of microprocessor. Also, this strategy is applied to 1(Hp), three phase induction motor, and compared with the other PWMs. From the results, the validity of this strategy could be verified.

• Journal of Power Electronics
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• v.8 no.4
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• pp.363-370
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• 2008

In this paper, three kinds of PWM strategies for a three-phase current-fed dc/dc converter are proposed and compared in terms of losses and voltage transfer ratio. Each PWM strategy is described graphically and their switching losses are analyzed. With the proposed PWM C strategy, one turn-off switching of each bridge switch is eliminated to reduce switching losses under the same switching frequency. In addition, RMS current through the bridge switches is lowered by using parallel connection between two bridge switches and thus, conduction losses of the switches are reduced. Further, copper losses of the transformer are decreased due to the reduced RMS current of each transformer's winding. Therefore, total losses are minimized and the efficiency of the converter is improved by using the proposed PWM C strategy. Digital signal processor (DSP: TI320LF2407) and a field-programmable gate array (FPGA: EPM7128) board are used to generate PWM patterns for three-phase bridge and clamp MOSFETs. A 500W prototype converter is built and its experimental results verify the validity of the proposed PWM strategies.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.35 no.6
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• pp.217-225
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• 1986

This paper describes the Optimal PWM strategy to reduce a pulsating harmonic torque for a variable-speed drive of 3 phase induction motor. This paper suggests the new Optimal control theory which consists of 1) defining a performance index related to the unwanted effects of the voltage harmonics, (i.e., the components of pulsating harmonic torques) 2) achieving its minimization by a suitable choice of the switching patterns. (i.e., of the commutation angles) This PWM strategy is compared with the conventional SPWM strategy by numerical method. It is believed that this proposed strategy can reduce more harmonic components and pulsating harmonic torques than SPWM strategy. Also, We could verify the validety of the numerical method by a result of simulation analysis of a variable speed 3phase induction motor.

• Journal of Power Electronics
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• v.14 no.3
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• pp.519-530
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• 2014

A novel simplified pulse width modulation(PWM) strategy for neutral point clamped (NPC) three-level converter is proposed in this paper.The direct output voltage modulation is applied to reduce the calculation time. Based on this strategy, several optimized control methods are proposed. The neutral point potential balancing algorithm is discussed and a fine neutral point potential balancing scheme is introduced. Moreover, the minimum pulse width compensation and switching losses reduction can be easily achieved using this modulation strategy. This strategy also gains good results even with the unequal DC link capacitor. The modulation principle is studied in detail and the validity of this simplified PWM strategy is experimentally verified in this paper. The experiment results indicated that the proposed PWM strategy has excellent performance, and the neutral point potential can be balanced well with unequal DC link captaincies.

• Journal of Power Electronics
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• v.19 no.1
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• pp.134-145
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• 2019

A single-phase step-up five-level inverter topology with a new phase-shifted pulse width modulation (PS-PWM) strategy is proposed in this paper. When compared with conventional single-phase five-level inverter topologies, the proposed topology can realize multilevel inversion with a double step-up ratio, a reduced number of switching devices and self-balanced capacitor voltages. When compared with the conventional PS-PWM strategy, the new PS-PWM strategy can be implemented with one carrier reduced, which makes it much easier to implement in a digital signal processor (DSP) system. Experimental results have been presented to verify the effectiveness of the proposed inverter and the PS-PWM strategy.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.34 no.9
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• pp.368-375
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• 1985

This paper describes the OPTIMAL PWM strategy to reduce harmonic losses for a variaboe-speed drive of an induction motor. This OPTIMAL theory is the strategy which can reduce motor losses by defining harmonic losses as a performance index and achieving it's minimization. This PWM strategy is compared with the conventional NATURAL PWM technique by a numerical method, and verified the validity of numerical method by a result of implementing in a practical 1 Hp-3 Phase induction motor drive system. Also, we could achieve a maximum efficiency to drive an induction motor by selecting appropriately one alternative between OPTIMAL and NATURAL PWM techniques, and employing it in a full driving range.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.5
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• pp.922-930
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• 2009

An optimized PWM switching strategy for an induction motor voltage control is developed and demonstrated. Space vector modulation in voltage source inverter offers improved DC-bus utilization and reduced commutation losses and has been therefor recognized the preferred PWM method especially in case of digital implementation. An optimized PWM switching strategy for an induction motor voltage control consists of switching between the two active and one zero voltage vector by using the proposed optimal PWM algorithm. The preferred switching sequence is defined as a function of the modulation index and period of a carrier wave. The sequence is selected by using the inverter switching losses and the current ripple as the criteria. For low and medium power application, the experimental results indicate that good dynamic response and reduced harmonic distortion can be achieved by increasing switching frequency.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.64 no.5
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• pp.718-725
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• 2015

This paper proposes a novel level-shifted PWM (LS-PWM) strategy for fault tolerant cascaded multilevel inverter. Most proposed fault-tolerant operation methods in many of studies are based on a phase-shifted PWM (PS-PWM) method. To apply these methods to multilevel inverter systems using LS-PWM, two additional steps will be implemented. During the occurrence of a single-inverter-cell fault, the carrier bands scheme is reconfigured and modulation levels of inverter cells are reassigned in this proposed fault-tolerant operation. The proposed strategy performs balanced three-phase line-to-line voltages and line currents when a switching device fault occurs in a cascaded multilevel inverter using LS-PWM. Simulation and experimental results are included in the paper to verify the proposed method.