• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.15 no.1
• /
• pp.51-58
• /
• 2001

Recently, DC-DC converters significantly increase the total losses as rising switching frequency. Trnditional soft switching technique for reducing switching losses even increase voltage/Clment stress of switch In this paper, Resonant circuit for soft switching is connected in parallel with power stage and only operates just before tum-on of the main sWItch. Therefore, ills doesn't affect the total circuit QI'||'&'||'pound;ration. The object of tIns paper is to make the linearized equivalent loss mxleIs. and to analyze the total losses by experiment. ZVT-PWlvI converter designed with 170-260[V] input, 400[V] 5[A] output, and 100[kHz] switching frequency is tested respectively with 500[W], 1[kW], 1.5[kW], and 2[kW] loads. The total losses in input 220[V], 2[kW] load are analyzed by usirm the linearized equivalent loss models.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• v.9 no.1
• /
• pp.959-962
• /
• 2005

Servomotors are used as key components of automated system by performing accurate positioning, accurate speed regulation, and precise motion control in response to commands from computers and sensors. Especially linear brushless servomotors have numerous advantages over ball screws, timing belts, rack/pinion drives and friction drives compared with rotary servomotors. This paper proposes the estimation of unknown parameters from the linear brushless DC motor which is operated by sinusoidal commutation. The estimated parameters are used to tune the controller gain and disturbance observer. In order to agree with this purpose, Digital Signal Processor(TMS320F240), developed for implementation of a speed Field Oriented Control(FOC), adopted in this study. The processor playing an important role in controller has A/D converters, PWM generators, riched I/O port internally.

• Journal of Power Electronics
• /
• v.13 no.2
• /
• pp.296-303
• /
• 2013

This paper proposes a high efficiency three-phase cascaded phase shifted H-bridge multi-level inverter without DC/DC converters for grid-tied multi string photovoltaic (PV) applications. The cascaded H-bridge topology is suitable for PV applications since each PV module can act as a separate DC source for each cascaded H-bridge module. The proposed phase shifted H-bridge multi-level topology offers advantages such as operation at a lower switching frequency and a lower current ripple when compared to conventional two level topologies. It is also shown that low ripple sinusoidal current waveforms are generated with a unity power factor. The control algorithm permits the independent control of each DC link voltage with a maximum power point for each string of PV modules. The use of the controller area network (CAN) communication protocol for H-bridge multi-level inverters, along with localized PWM generation and PV voltage regulation are implemented. It is also shown that the expansion and modularization capabilities of the H-bridge modules are improved since the individual inverter modules operate more independently. The proposed topology is implemented for a three phase 240kW multi-level PV power conditioning system (PCS) which has 40kW H-bridge modules. The experimental results show that the proposed topology has good performance.

• Journal of Power Electronics
• /
• v.15 no.3
• /
• pp.660-669
• /
• 2015

This paper presents a control scheme with a focus on the combination of phase disposition pulse width modulation (PDPWM) and DC capacitor voltage control for a chopper-cell based modular multilevel converter (MMC) for the purpose of eliminating the time-consuming voltage sorting algorithm and complex voltage balancing regulators. In this paper, the convergence of the DC capacitor voltages within one arm is realized by charging the minimum voltage module and discharging the maximum voltage module during each switching cycle with the assistances of MAX/MIN capacitor voltage detection and PDPWM signals exchanging. The process of voltage balancing control introduces no extra switching commutation, which is helpful in reducing power loss and improving system efficiency. Additionally, the proposed control scheme also possess the merit of a simple executing procedure in application. Simulation and experimental results indicates that the MMC circuit together with the proposed method functions very well in balancing the DC capacitor voltage and improving system efficiency even under transient states.

• Proceedings of the KIPE Conference
• /
• 2001.10a
• /
• pp.217-221
• /
• 2001

This paper presents a new prototype of soft-switching DC-DC power converter with a high frequency transformer link which has two active power controlled switches in full bridge rectifier with capacitor input type smoothing filter. In this DC-DC converter, ZVS of the inverter in transformer primary side and ZCS of active rectifier area in secondary side can be completely achieved by taking advantage of parasitic inductor component of high-frequency transformer and loss less snubbing capacitors. Its operation principle and salient features are described. The steady-state operating characteristics of the proposed DC-DC power converter are illustrated and discussed on the basis of the simulation results in addition to the experimental ones obtained by 2kw-40kHz power converter breadboard set up.

• Journal of Korea Society of Industrial Information Systems
• /
• v.20 no.1
• /
• pp.1-7
• /
• 2015

In this paper, a 12-bit high resolution, power and area efficiency hybrid digital pulse width modulator (DPWM) with process and temperature (PT) calibration has been proposed for digital controlled DC-DC converters. The hybrid structure of DPWM combines a 6-bit differential tapped delay line ring-mux digital-to-time converter (DTC) schema and a 6-bit counter-comparator DTC schema, resulting in a power and area saving solution. Furthermore, since the 6-bit differential delay line ring oscillator serves as the clock to the high 6-bit counter-comparator DTC, a high frequency clock is eliminated, and the power is significantly saved. In order to have a simple delay cell and flexible delay time controllability, a voltage controlled inverter is adopted to build the deferential delay cell, which allows fine-tuning of the delay time. The PT calibration circuit is composed of process and temperature monitors, two 2-bit flash ADCs and a lookup table. The monitor circuits sense the PT (Process and Temperature) variations, and the flash ADC converts the data into a digital code. The complete circuits design has been verified under different corners of CMOS 0.18um process technology node.

• Journal of Power Electronics
• /
• v.18 no.5
• /
• pp.1501-1512
• /
• 2018

This paper proposes a three-phase three-switch buck-type converter as the MSC of a wind turbine system. Owing to a novel switching modulation scheme that can eliminate the unwanted diode rectifier mode switching state, the proposed system exhibits a satisfying ac voltage and current waveform quality and torque ripple up to the level of a typical current source rectifier even under a wide power factor operating range. The proposed system has been verified through simulations and HILS tests on a PMSG wind turbine model of 5MW/4160V. The proposed converter has been shown to provide a stator current THD of 3.9% and a torque ripple of 1% under the rated power condition. In addition to the inherent advantage of the reduced switch count of three-phase three-switch buck-type converters, the proposed switching modulation technique can make this converter a viable solution for the MSC placed inside of a nacelle, which is under severe volume, weight and mechanical vibration design limits.

• Journal of Electrical Engineering and Technology
• /
• v.3 no.3
• /
• pp.408-421
• /
• 2008

In this paper, the parallel operation for a FC generation system is introduced and designed in order to increase the capacity for the distributed generation of a proton exchange membrane fuel cell (PEMFC) system. The equipment is the type that is used by parallel operated PEMFC generation systems which have two PEMFC systems, two dc/dc boost converters with shared dc link, and a grid-connected dc/ac inverter for embedded generation. The system requirement for the purpose of parallel operated generation using PEMFC system is also described. Aspects related to the mechanical (MBOP) and electrical (EBOP) component, size, and system complexity of the distributed generation system, it is explained in order to design an optimal distributed generation system using PEMFC. The optimal controller design for the parallel operation of the converter is suggested and informative simulations and experimental results are provided.

• Journal of Power Electronics
• /
• v.12 no.4
• /
• pp.567-577
• /
• 2012

This paper introduces a new scheme to balance the DC bus voltages of a cascaded H-bridge converter which is used as a Distribution Static Synchronous Series Compensator (D-SSSC) in electrical distribution network. The aim of D-SSSC is to control the power flow between two feeders from different substations. As a result of different cell losses and capacitors tolerance the cells DC bus voltage can deviate from their reference values. In the proposed scheme, by individually modifying the reference PWM signal for each cell, an effective balancing procedure is derived. The new balancing procedure needs only the line current sign and is independent of the main control strategy, which controls the total DC bus voltages of cascaded H-bridge. The effect of modulation index variation on the capacitor voltage is analytically derived for the proposed strategy. The proposed method takes advantages of phase shift carrier based modulation and can be applied for a cascaded H-bridge with any number of cells. Also the system is immune to loss of one cell and the presented procedure can keep balancing between the remaining cells. Simulation studies and experimental results validate the effectiveness of the proposed method in the balancing of DC bus voltages.

• Journal of Power Electronics
• /
• v.13 no.5
• /
• pp.829-840
• /
• 2013

The modified sinusoidal pulse-width modulation (SPWM) is one of the PWM techniques used in three-phase AC-DC buck converters. The modified SPWM works without the current sensor (the converter is current sensorless), improves production of sinusoidal AC current, enables obtainment of near-unity power factor, and controls output voltage through modulation gain (ranging from 0 to 1). The main problem of the modified SPWM is the huge starting current and voltage (during transient) that results from a large step change from the reference voltage. When the load changes, the output voltage significantly drops (through switching losses and non-ideal converter elements). The single-input single-output (SISO) approach with minor-loop voltage feedback controller presented here overcomes this problem. This approach is created on a theoretical linear model and verified by discrete-model simulation on MATLAB/Simulink. The capability and effectiveness of the SISO approach in compensating start-up current/voltage and in achieving zero steady-state error were tested for transient cases with step-changed load and step-changed reference voltage for linear and non-linear loads. Tests were done to analyze the transient performance against various controller gains. An experiment prototype was also developed for verification.