• Title/Summary/Keyword: PR Patterning

Search Result 27, Processing Time 0.022 seconds

Simple fabrication process and characteristic of a screen-printed triode-CNT field emission arrays for the flat lamp application

  • Jung, Y.J.;Park, J.H.;Jeon, S.Y.;Park, S.J.;Alegaonkar, P.S.;Yoo, J.B.;Park, C.Y.
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2006.08a
    • /
    • pp.1214-1218
    • /
    • 2006
  • We introduced simple fabrication process for field emission devices based on carbon nanotubes (CNTs) emitters. Instead of using the ITO material as a transparent electrode, a metal (Au) with thickness of 5-20nm was used. Moreover, the ITO patterning process was eliminated by depositing metal layer, before the CNT printing process. In addition, the thin metal layer on photo resist (PR) layer was used as UV block. We fabricated the CNT field emission arrays of triode structure with simple process. And I-V characteristics of field emission arrays were measured. The maximum current density of $254{\mu}A/cm2$ was achieved when the gate and the anode voltage was kept 150V and 3000V, respectively. The distance between anode and cathode was kept constant.

  • PDF

The Patterning of Polyimide Thin Films for the Additive $CF_4$ gas ($CF_4$ 첨가에 따른 polyimide 박막의 패터닝 연구)

  • Kang, Pil-Seung;Kim, Chang-Il;Kim, Sang-Gi
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2001.11b
    • /
    • pp.209-212
    • /
    • 2001
  • Polyimide(PI) films have been considered as the interlayer dielectric materials due to low dielectric constant, low water absorption, high gap-fill and planarization capability. The PI mm Was etched with using inductively coupled plasma (ICP). The etching characteristics such as etch rate and selectivity were evaluated to gas mixing ratio. High etch rate was $8300{\AA}/min$ and vertical profile was approximately acquired $90^{\circ}$ at $CF_{4}/(CF_{4}+O_{2})$ of 0.2. The selectivies of polyimide to PR and $SiO_{2}$ were 1.2, 5.9, respectively. The etching profiles of PI films with an aluminum pattern were measured by a scanning electron microscope (SEM). The chemical states on the PI film surface were investigated by x-ray photoelectron spectroscopy (XPS). Radical densities of oxygen and fluorine in different gas mixing ratio of $O_{2}/CF_{4}$ were investigated by optical emission spectrometer (OES).

  • PDF

Characterization of Combined Micro- and Nano-structure Silicon Solar Cells using a POCl3 Doping Process

  • Jeong, Chaehwan;Kim, Changheon;Lee, Jonghwan;Yi, Junsin;Lim, Sangwoo;Lee, Suk-Ho
    • Current Photovoltaic Research
    • /
    • v.1 no.1
    • /
    • pp.69-72
    • /
    • 2013
  • Combined nano- and micro-wires (CNMWs) Si arrays were prepared using PR patterning and silver-assisted electroless etching. A $POCl_3$ doping process was applied to the fabrication of CNMWs solar cells. KOH solution was used to remove bundles in CNMWs and the etching time was varied from 30 to 240 s. The lowest reflectance of 3.83% was obtained at KOH etching time of 30 s, but the highest carrier lifetime of $354{\mu}s$ was observed after the doping process at 60 s. At the same etching time, a $V_{oc}$ of 574 mV, $J_{sc}$ of $28.41mA/cm^2$, FF of 74.4%, and Eff. of 12.2% were achieved in the CNMWs solar cell. CNMWs solar cells have potential for higher efficiency by improving the post-process and surface-rear side structure.

A study of fabrication micro bump for TSP testing using maskless lithography system. (Maskless Lithography system을 이용한 TSP 검사 용 micro bump 제작에 관한 연구.)

  • Kim, Ki-Beom;Han, Bong-Seok;Yang, Ji-Kyung;Han, Yu-Jin;Kang, Dong-Seong;Lee, In-Cheol
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.18 no.5
    • /
    • pp.674-680
    • /
    • 2017
  • Touch Screen Panel (TSP) is a widely used personal handheld device and as a large display apparatus. This study examines micro bump fabrication technology for TSP test process. In the testing process, as TSP is changed, should make a new micro bump for probing and modify the testing program. In this paper we use a maskless lithography system to confirm the potential to fabricatemicro bump to reducecost and manufacturing time. The requiredmaskless lithography system does not use a mask so it can reduce the cost of fabrication and it flexible to cope with changes of micro bump probing. We conducted electro field simulation by pitches of micro bump and designed the lithography pattern image for the maskless lithography process. Then we conducted Photo Resist (PR) patterning process and electro-plating process that are involved in MEMS technology to fabricate micro bump.

The Improvement of Fabrication Process for a-Si:H TFT's Yield (a-Si:H TFT의 수율 향상을 위한 공정 개선)

  • Hur, Chang-Wu
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.11 no.6
    • /
    • pp.1099-1103
    • /
    • 2007
  • TFT's have been intensively researched for possible electronic and display applications. Through tremendous engineering and scientific efforts, a-Si:H TFT fabrication process was greatly improved. In this paper, the reason on defects occurring at a-Si:H TFT fabrication process is analyzed and solved, so a-Si:H TFT's yield is increased and reliability is improved. The a-Si:H TFT of this paper is inverted staggered type TFT. The gate electrode is formed by patterning with length of $8{\mu}m{\sim}16{\mu}m$ and width of $80{\sim}200{\mu}m$ after depositing with gate electrode (Cr). We have fabricated a-SiN:H, conductor, etch-stopper and photo-resistor on gate electrode in sequence, respectively. We have deposited n+a-Si:H, NPR(Negative Photo Resister) layer after forming pattern of Cr gate electrode by etch-slower pattern. The NPR layer by inverting pattern of upper Sate electrode is patterned and the n+a-Si:H layer is etched by the NPR pattern. The NPR layer is removed. After Cr layer is deposited and patterned, the source-drain electrode is formed. The a-Si:H TFT made like this has problems at photo-lithography process caused by remains of PR. When sample is cleaned, this remains of PR makes thin chemical film on surface and damages device. Therefor, in order to improve this problem we added ashing process and cleaning process was enforced strictly. We can estimate that this method stabilizes fabrication process and makes to increase a-Si:H TFT's yield.

Dry Etching Characteristics of $YMnO_3$ Thin Films Using Inductively Coupled Plasma (유도결합 플라즈마를 이용한 $YMnO_3$ 박막의 건식 식각 특성 연구)

  • 민병준;김창일;창의구
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.14 no.2
    • /
    • pp.93-98
    • /
    • 2001
  • YMnO$_3$ films are excellent gate dielectric materials of ferroelectric random access memories (FRAMs) with MFSFET (metal -ferroelectric-semiconductor field effect transistor) structure because YMnO$_3$ films can be deposited directly on Si substrate and have a relatively low permittivity. Although the patterning of YMnO$_3$ thin films is the requisite for the fabrication of FRAMs, the etch mechanism of YMnO$_3$ thin films has not been reported. In this study, YMnO$_3$thin films were etched with Cl$_2$/Ar gas chemistries in inductively coupled plasma (ICP). The maximum etch rate of YMnO$_3$ film is 285$\AA$/min under Cl$_2$/(Cl$_2$+Ar) of 1.0, RF power of 600 W, dc-bias voltage of -200V, chamber pressure of 15 mTorr and substrate temperature of $25^{\circ}C$. The selectivities of YMnO$_3$ over CeO$_2$ and $Y_2$O$_3$ are 2.85, 1.72, respectively. The selectivities of YMnO$_3$ over PR and Pt are quite low. Chemical reaction in surface of the etched YMnO$_3$ thin films was investigated with X-ray photoelectron spectroscopy (XPS) surface of the selected YMnO$_3$ thin films was investigated with X-ray photoelectron spectroscopy(XPS) and secondary ion mass spectrometry (SIMS). The etch profile was also investigated by scaning electron microscopy(SEM)

  • PDF

Development of the DNA Sequencing Chip with Nano Pillar Array using Injection Molding (Nano Pillar Array 사출성형을 이용한 DNA 분리 칩 개발)

  • Kim S.K.;Choi D.S.;Yoo Y.E.;Je T.J.;Kim T.H.;Whang K.Y.
    • Proceedings of the Korean Society of Precision Engineering Conference
    • /
    • 2005.06a
    • /
    • pp.1206-1209
    • /
    • 2005
  • In recent, injection molding process for features in sub-micron scale is under active development as patterning nano-scale features, which can provide the master or stamp for molding, and becomes available around the world. Injection molding has been one of the most efficient processes for mass production of the plastic product, and this process is already applied to nano-technology products successfully such as optical storage media like DVD or BD which is a large area plastic thin substrate with nano-scale features on its surface. Bio chip for like DNA sequencing may be another application of this plastic substrate. The DNA can be sequenced using order of 100 nm pore structure when making the DNA flow through the pore structure. Agarose gel and silicon based chip have been used to sequence the DNA, but injection molded plastic chip may have benefit in terms of cost. This plastic DNA sequencing chip has plenty of pillars in order of 100 nm in diameter on the substrate. When the usual features in case of DVD or BD have very low aspect ratio, even less than 0.5, but the DNA chip will have relatively high aspect ratio of about 2. It is not easy to injection mold the large area thin substrate with sub-micron features on its surface due to the characteristics of the molding process and it becomes much more difficult when the aspect ratio of the features becomes high. We investigated the effect of the molding parameters for injection molding with high aspect ratio nano-scale features and injection molded some plastic DNA sequencing chips. We also fabricated PR masters and Ni stamps of the DNA chip to be used for molding

  • PDF