• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2004.04a
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• pp.491-494
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• 2004

Neural Oscillator can be applied to oscillatory systems such as the image recognition, the voice recognition, estimate of the weather fluctuation and analysis of geological fluctuation etc in nature and principally, it is used often to pattern recoglition of image information. Conventional BPL(Back-Propagation Learning) and MLNN(Multi Layer Neural Network) are not proper for oscillatory systems because these algorithm complicate Learning structure, have tedious procedures and sluggish convergence problem. However, these problems can be easily solved by using a synchrony characteristic of neural oscillator with PLL(phase-Locked Loop) function and by using a simple Hebbian learning rule. And also, Recognition velocity of Korean Character can be improved by using a Neural Oscillator's learning accelerator factor η$\_$ij/

• Journal of the Korean Solar Energy Society
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• v.35 no.6
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• pp.9-15
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• 2015

In this paper, a parallel operating technique for the stand alone photovoltaic (PV) power conditioning system (PCS) is proposed. The proposed parallel operating technique can increase the power rating of the system easily. Also, it provide three-phase connection function. The proposed technique does not separated master and slave system. Also, it does not use the separated synchronization line. Therefore, the PCS can supply continuous power even if one of the PCS breaks down. This technique is composed of a phase locked loop (PLL) control, droop control, current limit control and etc. Experimental result obtained on 2-kW prototype to verify the proposed technique.

• Proceedings of the KIEE Conference
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• 2004.10a
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• pp.224-226
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• 2004

Digital Kalman filter is presented as a powerful approach to obtain the reference estimation of the control current for shunt active power filter. This algorithm provides the best estimate of the fundamental and harmonic frequency components from the sampled values of the line current or voltage. By adopting of the digital Kalman filtering algorithm, the structure of the control algorithm eliminates the need of a Phase locked loop(PLL) for the synchronization of the reference signal used in the compensation and it not sensitive to the distortion of the line voltage. The effectiveness of the algorithm is confirmed by the computer simulations.

• Proceedings of the KSR Conference
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• 2004.10a
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• pp.1480-1485
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• 2004

In this paper, a real-time digital kalman filtering algorithm is used to obtain the reference estimation of the control current for shunt active power filter. This algorithm provides the best estimate of the fundamental and harmonic frequency components from the sampled values of the line current or voltage waveform. By adopting of the digital Kalman filtering algorithm, the structure of the control algorithm eliminates the need of a Phase locked loop(PLL) for the synchronization of the reference signal used in the compensation and it not sensitive to the distortion of the line voltage. The effectiveness of the algorithm is confirmed by the computer simulations.

• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.54-56
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• 2005

The paper proposes the solar photovoltaic power generation system method for photovoltaic system to solve the power shortage due the sudden power demand. So that supplied electric power to system at appearance during surplus electric power minute and unit moment link driving with common use system is available, digital PLL circuit system voltage through composition and phase of solar photovoltatic power generation system to do synchronization do. Feed forward controller was applied to get fast current response Solar cell that is changed by solar radiation always kept the maximum output when it used Step up chopper. The dynamic character had checked through simulation used Matlab Sumulink and confirmed through an experiment.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.61-62
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• 2015

본 논문에서는 단상 UPS 모듈을 직렬로 연결 시 모듈간의 위상을 동기화하는 제어 알고리즘을 제안한다. 단상 직렬 모듈 UPS 시스템을 구성할 때, 각 모듈의 위상이 동기화 되어 있지 않는다면 직렬 연결된 출력단을 통해 부하에 불안정한 전력을 공급하게 된다. 따라서 직렬 구성으로 각 모듈의 출력전압 위상을 동기화하여 안정적인 출력전압 제어가 필요하다. 기존에는 CAN통신을 이용했지만 본 논문에서는, Master, Slave 모듈의 PLL 기법을 이용한 순차적인 제어를 통해 위상을 동기화시킬 수 있는 제어 알고리즘을 제안한다. 제안하는 제어 알고리즘은 시뮬레이션을 통해 타당성을 검증하였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.11A
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• pp.929-935
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• 2003

An analog/digital mixed mode ASIC for network synchronization of ATM switching system has been designed and fabricated. This ASIC generates a 234.7/46.94 ㎒ system clock and 77.76/19.44 ㎒ user clock using 46.94 ㎒ transmitted clocks from other systems. It also includes digital circuits for checking and selecting of the transmitted clocks. For effective ASIC design, full custom technique is used in 2 analog PLL circuits design, and standard cell based technique is used in digital circuit design. Resistors and capacitors for analog circuits are specially designed which can be fabricated in general CMOS technology, so the chip can be implemented in 0.8$\mu\textrm{m}$ digital CMOS technology with no expensive. Testing results show stable 234.7 ㎒ and 19.44 ㎒ clocks generation with each 4㎰ and 17㎰ of low ms jitter.

• Journal of Power Electronics
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• v.18 no.5
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• pp.1347-1356
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• 2018

In a three-phase system, three-phase AC signals can be translated into two-phase DC signals through a coordinate transformation. Thus, the PI regulator can realize a zero steady-state error for the DC signals. In the control of a three-phase grid-connected inverter, the phase angle of grid is normally detected by a phase-locked loop (PLL) and takes part in a coordinate transformation. A novel control strategy for a three-phase grid-connected inverter with a frequency-locked loop (FLL) based on coordinate transformation is proposed in this paper. The inverter is controlled as a current supply. The grid angle, which takes part in the coordinate transformation, is replaced by a periodic linear changing angle from $-{\pi}$ to ${\pi}$. The changing angle has the same frequency but a different phase than the grid angle. The frequency of the changing angle tracks the grid frequency by the negative feedback of the reactive power, which forms a FLL. The control strategy applies to non-ideal grids and it is a lot simpler than the control strategies with a PLL that are applied to non-ideal grids. The structure of the FLL is established. The principle and advantages of the proposed control strategy are discussed. The theoretical analysis is confirmed by experimental results.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.7
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• pp.545-551
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• 2013

Timing recovery loop composed of the Timing Error Detector(TED), loop filter and resampler is widely used for the timing synchronization in MQASK receivers. Since TED is sensitive to the delay between the symbol period of the signal and sampling period, the output is averaged out when the symbol rate and sampling rate are quite different the recovery loop cannot work at all. This paper presents a sampling frequency discriminator (SRD), which detects the frequency offset of the sampling clock to the symbol clock of the MQASK data transmitted. Employing the SRD, the closed loop timing recovery scheme performs the frequency-aided timing acquisition and achieve the synchronization at extremely high sampling frequency offset, which can be used in variable symbol rate MQASK receivers.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.55 no.12
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• pp.526-533
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• 2006

In this paper, we presented the synchronization module between RF shower system and RFID Reader to extend interrogating range on Mobile RFID system, Costas Loop and FPLL(Frequency/phase Lock Loop) were used. We achieved compromised range of 3MHz locking frequency, 1ms locking time and figured out remarkable Hopping frequency of the Reader. The prototype of the new designed RFID system has been tested with ISO18000-6 type-B Tag. The read range between designed RFID Reader and Tag has been measured, it increased triple times by adjusting the Shower system output level.