• Journal of KIISE:Computing Practices and Letters
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• 제15권3호
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• pp.211-215
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• 2009

As Programmable Logic Controllers (PLCs) are increasingly used to implement safety critical systems such as nuclear instrumentation & control system, formal verification for PLC based programs is becoming essential. This paper proposes a formal verification technique for PLC program implemented with function block diagram (FBD). In order to verify an FBD program, we translate an FBD program into a Verilog model and perform model checking using SMV model checker We developed a tool, FBD Verifier, which translates FBD programs into Verilog models automatically and supports efficient and intuitive visual analysis of a counterexample. With the proposed approach and the tool, we verified large FBD programs implementing reactor protection system of Korea Nuclear Instrumentation and Control System R&D Center (KNICS) successfully.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• 제14권1호
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• pp.59-66
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• 2000

As the highly complex and precise control functions are required in modern industrial process control system, the complex function models and developed in each hardware and software of PLC. The SFC graphical language is very powerful for describing the sequential logic control algorithm, on the other hand it graphical language is very powerful for describing the sequential logic control algorithm, on the other hand it has problems in describing the interlock logic control algorithm, such as error management algorithm. In this paper, we propose the efficient error management method using the action qualifiers to design the error management algorithm in industrial process control system described scheme, we realize the error management logic in process control system of film coating machine.From the experiment results, we confirm that the proposed scheme is very useful in aspects to realize easily th error management logic and to reduce the memory capacity for user's program.

• Journal of the Korea Society for Simulation
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• 제17권4호
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• pp.1-9
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• 2008

Proposed in the paper is an automated procedure to construct a plant model for PLC simulation. Since PLC programs only contain the control logic without the information on the plant model, it is necessary to build the corresponding plant model to perform simulation. Conventionally, a plant model for PLC simulation has been constructed manually, and it requires much efforts as well as the in-depth knowledge of simulation. As a remedy for the problem, we propose an automated procedure to generate a plant model from the symbol table of a PLC program. To do so, we propose a naming rule for PLC symbols so that the symbol names include enough information on the plant model. By analyzing such symbol names, we extract a plant model automatically. The proposed methodology has been implemented, and test runs were made.

• Journal of Institute of Control, Robotics and Systems
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• 제7권12호
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• pp.1009-1014
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• 2001

The ladder diagram (LD) for programmable logic controllers (PLCs) ar responsible for much important roles in advance industrial automation. As automated systems become more complex the design procedures of the system become more difficult as well. Hence. the design automation issues based on discrete event models(DEMs) are receiving more attention. One of the popular ways of tackling these problems is employing Petri nets. In this paper, we use the modified automation Petri net(MAPN) to model the manufacturing system and the modified token passing logic (MTPL) method conversion (ECC) algorithm based on the MAPN and the MTPL Finally, an example of the manufacturing system is provided to illustrate the proposed ECC algorithm.

• Journal of Institute of Control, Robotics and Systems
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• 제12권8호
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• pp.834-841
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• 2006

Recently, many enterprises are installing AMSs(Automated Manufacturing Systems) for their competitive advantages. As the level of automation increases, proper design and validation of control logic is a imperative task for the successful operation of AMSs. However, current discrete event simulation methods mainly focus on the performance evaluation. As a result, they lack the modeling capabilities for the detail logic of automated manufacturing system controller. Proposed in this paper is a method of validation of the controller logic for automated material handling system using an object-oriented design and simulation. Using this method, FA engineers can validate the controller logic easily in earlier stage of system design, so they can reduce the time for correcting the logic errors and enhance the productivity of control program development Generated simulation model can also be used as a communication tool among FA engineers who have different experiences and disciplines.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• 제20권4호
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• pp.49-55
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• 2006

In industrial control system used by Programmable Logic Controller(PLC), ladder Diagram(LD) is the must widely utilized and plays an important role in industrial control system. But recently, the study about Sequential Function Chart(SFC) is performed actively. When we program by SFC, generally, we design one routine from start to end. This method is difficult to design, and we often make mistakes. In this paper, we propose the method that we compose each sub-system after we design each sub-system and confirm his feasibility through an actual examples.

• Journal of KIISE:Software and Applications
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• 제32권12호
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• pp.1271-1282
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• 2005

Recently, PC-based control is incredibly developed in the industrial control field, but it is difficult for PLC programming in PC. Therefore, I need to develop the softeware PLC, which support the international PLC programming standard(IECl131-3) and can be applied to diverse control system by using C language. In this paper, I have developed the ISPLC(Intelligent Agent System based Software Programmable Logic Controller). In ISPLC system, LD programmed by a user which is used over $90\%$ among the 5 PLC languages, is converted to IL, which is one of intermediate codes, and IL is converted to the standard C rode which can be used in a commercial editor such as Visual C++. In ISPLC, the detection of logical error in high level programming(C) is more eaier than PLC programming itself The study of code conversion of LD->IL->C is firstly tried in the world as well as KOREA. I developed an execution engine with a good practical application. To show the effectiveness of the developed system, 1 applied it to a practical case, a real time traffic control(RT-TC) system. ISPLC is minimized the error debugging and programming time owing to be supported by windows application program.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• 제28권2호
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• pp.92-99
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• 2014

The paper is related to smart maximum power system based on program logic. Especially, this system compares the total demand power with the target power by using the signal from the digital kilo watt meter. Based on the power information by the maximum power control equipment the consumed future power is anticipated. In addition, through consumed future power the controllable target power is set, and it applies on the maximum power control equipment. User or manager would control the load efficiently through the simple programming which could control load based on the control sequence and relay. To begin with the conventional maximum power control algorithm is surveyed, and the smart maximum power control system based on program logic is used, and the new algorithm from full load to proportion shut down is proposed by using PLC program. the validity of the proposed control scheme is investigated by both simulation results.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1996년도 한국자동제어학술회의논문집(국내학술편); 포항공과대학교, 포항; 24-26 Oct. 1996
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• pp.706-709
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• 1996

In this paper, an algorithm for PLC(Programmable Logic Controller) fault diagnosis system is proposed and experimentation is conducted with a PLC and a virtual plant. Wrong output backward tracking algorithm is proposed in order to find the external faults of PLC. And query with keywords of the fault systems and specially designed test sequence programs are used. We lay emphasis on the backward tracking algorithm to diagnose the faults of PLC. It is shown experimentally that the proposed algorithm can find the faults which a typical self diagnostics in the-commercially available PLC cannot.

• Journal of the Korea Academia-Industrial cooperation Society
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• 제11권1호
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• pp.107-112
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• 2010

When we design the control system used Programmable Logic controller(PLC), if we program a Sequential Function Chart(SFC), It is easy to understand the sequential flow of control, to maintenance the controller and to describe a program. SFC language is programmed by a single sequence, a select sequence and a parallel sequence. In a select sequence, when the select step is error, the whole process is stopped. If the error step has no connection the whole process, the loss is down when we debugging the program without stopping the whole process. Therefore, this thesis shows the efficient method of remote control for select sequence and we confirmed its feasibility through actual example.