• KIPS Transactions on Computer and Communication Systems
• /
• v.6 no.3
• /
• pp.105-112
• /
• 2017

PCI Express is a bus technology that connects the processor and the peripheral I/O devices that widely used as an industry standard because it has the characteristics of high-speed, low power. In addition, PCI Express is system interconnect technology such as Ethernet and Infiniband used in high-performance computing and computer cluster. PGAS(partitioned global address space) programming model is often used to implement the one-sided RDMA(remote direct memory access) from multi-host systems, such as computer clusters. In this paper, we design and implement a OpenSHMEM API based on PCI Express maintaining the existing features of OpenSHMEM to implement RDMA based on PCI Express. We perform experiment with implemented OpenSHMEM API through a matrix multiplication example from system which PCs connected with NTB(non-transparent bridge) technology of PCI Express. The PCI Express interconnection network is currently very expensive and is not yet widely available to the general public. Nevertheless, we actually implemented and evaluated a PCI Express based interconnection network on the RDK evaluation board. In addition, we have implemented the OpenSHMEM software stack, which is of great interest recently.

• Journal of the Korean Society for Aeronautical & Space Sciences
• /
• v.48 no.12
• /
• pp.1005-1012
• /
• 2020

Avionics systems that use the PCI-Express bus unfortunately cannot use at least one I/O device if the bus fails, because the I/O device is connected to CPU through only one PCI-Express channel. This paper presents a fault-tolerant architecture of the PCI-Express bus for avionics systems, which tolerates one channel failure with help of the other redundant channel that has not been failed. In this architecture, each redundant PCI-Express channel connects a corresponding port of CPU to each switch logic of channels to provide each I/O device through a switched fault-tolerant channel. This paper includes the results of experimentation to show that the architecture detects the faulty condition in real time and switches the channel to the other redundant channel which has not been failed, when the architecture meets a failure.

• Proceedings of the Korea Information Processing Society Conference
• /
• 2005.05a
• /
• pp.1671-1674
• /
• 2005

PCI 2.2 마스터 디바이스가 타겟 디바이스로부터 데이터를 읽어 오고자 할 때 타겟 장치는 내부적으로 데이터를 준비해야 함으로 인해 PCI 버스가 데이터 전송 없이 점유되는 상황이 발생한다. 이를 위해 PCI 2.2 사양에서는 지연전송을 제안하여 전송 효율을 향상시켰지만 이 역시 타겟 디바이스가 얼마의 데이터를 미리 준비 해둘지를 알 수 없어 인해 버스 사용 및 데이터 전송 효율을 떨어뜨리는 원인을 제공한다. 본 논문에서는 먼저 이를 해결하기 위한 새로운 방법을 제안한다. 그리고 이 방법을 지원하는 PCI 타겟 컨트롤러와 로컬 디바이스를 설계하였다. 설계되어진 PCI 타겟 컨트롤러는 PCI 2.2를 전혀 모르는 사용자도 쉽게 PCI 인터페이스를 지원할 수 있도록 한 프로토콜 변환기로 사용될 수 있다. PCI 타겟 컨트롤러와 로컬 디바이스는 먼저 행위 모델로 설계하였으며 또한 이들을 검증하기 위한 테스트벤치를 설계 하였다. 이를 통해 제안되어진 방법의 성능을 측정하였으며 후에 다시 실제 하드웨어로 설계하였다. 설계되어진 하드웨어를 효과적으로 검증하기 위해 참조모델, 랜덤발생기, 비교엔진으로 구성된 랜덤 테스트 환경을 제안하였다. 이 검증 환경에서 수행된 결과를 비교함으로써 일반적인 테스트 벡터에서 발견하기 어려운 에러들을 발견할 수 있었다.

• Electronics and Telecommunications Trends
• /
• v.22 no.4 s.106
• /
• pp.133-143
• /
• 2007

PCI Express는 고속 차동신호를 사용한 점대점(point-to-point) 프로토콜로 신호무결성(signal-integrity) 측정을 위해 기존의 병렬버스신호와 다른 파라미터(parameter)들이 사용되고 있다. PCI Express 시스템에서 중요한 전기 파라미터는 loss와 jitter이며 eye diagram을 통해서 분석이 가능하다. 본 고는 PCI Express 송수신 버퍼의 전기 규격과 애드인카드(add-in card) 시스템의 전기적 여유(budgets)의 의미와 분석을 다룬다. 또한 실제적인 PCI Express 시스템에서 전기 파라미터들을 측정하고 분석, 디버깅의 방법을 다룬다.

• Proceedings of the Korean Institute of Intelligent Systems Conference
• /
• 2001.12a
• /
• pp.103-108
• /
• 2001

본 논문은 대량의 퍼지 데이터를 고속으로 전송 및 추론하기 위한 PCI 기반 병렬 퍼지 시스템을 구현한다. 많은 퍼지 데이터의 고속전송을 위해 PCI 인터페이스를 사용하고, 병렬 퍼지 추론 시스템을 위한 병렬 퍼지 모듈들을 FPGA로 설계하여 PCI 타겟 코어로서 병렬로 동작하게 한다. 이러한 시스템을 VHDL을 사용하여 설계 및 구현하였다. 본 시스템은 고속의 퍼지추론을 요하는 시스템 또는 대규모의 퍼지 전문가 시스템 등에 활용될 수 있다.

• Proceedings of the Korea Information Processing Society Conference
• /
• 2017.11a
• /
• pp.27-29
• /
• 2017

오늘날 PCI Express는 프로세서와 시스템 장치들과 연결을 위한 표준 I/O 인터페이스로 널리 사용되고 있다. 고속, 저전력, 고효율의 특성을 가진 PCI Express는 기존 네트워크 연결망의 대안으로 고려되고 있다. 본 논문에서는 이러한 PCI Express를 서로 다른 시스템 간에 통신을 도와주는 PCI Express Interconnect를 통해 네트워크 연결망을 형성하고, 기존의 TCP/IP 프로토콜 스택을 거쳐 Socket 통신을 하는 Application을 PCI Express를 거쳐 통신할 수 있도록 하는 네트워크 모듈을 개발해보고자 한다. 이를 위해 관련 연구를 조사하여 네트워크 Family를 새로 정의하여 TCP/IP 프로토콜 스택을 거치지 않는 PCI Express 통신 프로토콜이 구현 중에 있다.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.34 no.12A
• /
• pp.962-970
• /
• 2009

This paper proposes a self-organizing scheme which collects the information of neighboring cells, and then assigns a Physical Cell Identifier (PCI) for a newly deployed cell in LTE systems. The number of PCIs are limited, so the reuse of PCIs in different cells is unavoidable. In a dense urban environment where many small cells such as Pico/Femto cells are deployed under macro cells, it is expected that the number of PCIs becomes more limited. Therefore, the limited number of PCIs needs to be allocated very efficiently. We propose a PCI allocation scheme for a newly deployed cell that can autonomously select a PCI to increase PCI reuse efficiency by utilizing the levels of received signal strength from neighboring cells. To evaluate the performance of the proposed scheme, simulations have been developed and performed with two scenarios on the coverage types of newly deployed cells. When the proposed scheme is applied, the simulation results show that the number of PCIs required for the operation of the system can be saved so that PCIs can be efficiently reused.

• Journal of the Institute of Electronics Engineers of Korea CI
• /
• v.41 no.4
• /
• pp.1-8
• /
• 2004

When the PCI 2.2 bus master requests data using Memory Read command, the target device my hold PCI bus without data transfer for a long time because the target device requires time to prefetch data internally. Because the PCI bus usage efficiency and the data transfer efficiency are decreased due to this situation, the PCI specification recommends to use the Delayed Transaction mechanism to improve the performance. But the mechanism doesn't fully improve performance because the target device doesn't blow prefetch data size exactly. In this paper, we propose a new method to transfer data efficiently when the bus master reads data from the target device. The bus master informs the target device the exact read data size using prefetch request using Memory Write command. The simulation result shows that the proposed method has the higher data transfer efficiency than the Delayed Transaction about 10%.

• Radiation Oncology Journal
• /
• v.37 no.3
• /
• pp.156-165
• /
• 2019

Purpose: Prophylactic cranial irradiation (PCI) is a standard treatment for limited-stage small cell lung cancer (LS-SCLC) showing a response to initial treatment, but many patients do not receive PCI due to comorbidities or refusal. This study aims to define the patient group for whom PCI can be omitted with minimal risk. Materials and Methods: Patients with LS-SCLC who underwent radiotherapy with curative aim at our institution between January 2004 and December 2015 were retrospectively reviewed. Patients who did not receive PCI were evaluated for brain metastasis-free survival (BMFS), progression-free survival (PFS), overall survival (OS), and prognostic factors for survival, and treatment outcomes were compared with a patient cohort who received PCI. Results: A total of 350 patients achieved a response following thoracic radiotherapy, and 190 of these patients did not receive PCI. Stage I-II and a complete response (CR) to initial therapy were good prognostic factors for BMFS and OS on univariate analysis. Patients with both stage I-II and a CR who declined PCI showed comparable 2-year BMFS to those who received PCI (92% vs. 89%). In patients who achieved CR, PCI did not significantly improve OS or PFS. Conclusion: There should be less concern about omitting PCI in patients with comorbidities if they have stage I-II or a CR, with brain metastasis control being comparable to those patients who receive PCI.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.25 no.2
• /
• pp.199-207
• /
• 2014

Although High-altitude electromagnetic pulse(HEMP) protection filter meets the requirements of pulsed current injection(PCI) acceptance test, the equipment under test which has low electromagnetic susceptibility level can be damaged during PCI verification test that is performed on operating condition of equipment. This paper proposed the HEMP effect analysis method using comparison of norms between residual current of HEMP filter and transient electromagnetic conducted susceptibility criteria of equipment, as an alternative method under the condition that performing PCI verification test is limited in HEMP hardened facilities. PCI acceptance test of HEMP filter, transient electromagnetic conducted susceptibility test, and PCI verification test are performed and test results are analyzed.