• 대한한방내과학회지
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• 제44권3호
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• pp.387-401
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• 2023

Objective: This study was conducted to investigate the preventive effect of herbal medicines on restenosis after percutaneous coronary intervention (PCI) by reviewing randomized controlled trials (RCTs). Methods: RCTs were searched for herbal medicine treatment after PCI using eight online databases (PubMed, CNKI, Wanfang, J-STAGE, OASIS, ScienceON, KTKP, and KISS). Studies that confirmed restenosis through coronary angiography at follow-up were selected according to the inclusion and exclusion criteria. The primary outcome was the restenosis rate, and the secondary outcome was the angina recurrence rate. Data were extracted from the final selected studies according to the research methodology and then analyzed with Review Manager 5.4.1. Study quality was assessed using Cochrane's risk-of-bias (RoB) tool. Results: Of the 252 papers obtained through the primary search, nine studies that met the selection criteria were finally selected. In these nine studies, herbal medicine combined with western medicine was used for the experimental group, and western medicine treatment was used alone for the control group. The meta-analysis result revealed that the restenosis rate and angina recurrence rate were significantly lower in the experimental group than in the control group (RR=0.34, 95% CI: 0.22-0.53, p<0.00001, I²=0% and RR=0.47, 95% CI: 0.29-0.78, p=0.004, I²=0%, respectively). Furthermore, the quality of studies assessed by Cochrane's RoB was low. Conclusions: This study showed that the combined treatment of herbal medicine and western medicine was effective in preventing restenosis and angina after PCI. As the number of papers included in this study was small, a large number of high-quality clinical studies should be considered in the future.

• Korean Journal of Radiology
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• 제23권5호
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• pp.539-547
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• 2022

Objective: To investigate the association between functional tumor burden of peritoneal carcinomatosis (PC) derived from diffusion-weighted imaging (DWI) and overall survival in patients with advanced ovarian carcinoma (OC). Materials and Methods: This prospective study was approved by the local research ethics committee, and informed consent was obtained. Fifty patients (mean age ± standard deviation, 57 ± 12 years) with stage III-IV OC scheduled for primary or interval debulking surgery (IDS) were recruited between June 2016 and December 2021. DWI (b values: 0, 400, and 800 s/mm²) was acquired with a 16-channel phased-array torso coil. The functional PC burden on DWI was derived based on K-means clustering to discard fat, air, and normal tissue. A score similar to the surgical peritoneal cancer index was assigned to each abdominopelvic region, with additional scores assigned to the involvement of critical sites, denoted as the functional peritoneal cancer index (fPCI). The apparent diffusion coefficient (ADC) of the largest lesion was calculated. Patients were dichotomized by immediate surgical outcome into high- and low-risk groups (with and without residual disease, respectively) with subsequent survival analysis using the Kaplan-Meier curve and log-rank test. Multivariable Cox proportional hazards regression was used to evaluate the association between DWI-derived results and overall survival. Results: Fifteen (30.0%) patients underwent primary debulking surgery, and 35 (70.0%) patients received neoadjuvant chemotherapy followed by IDS. Complete tumor debulking was achieved in 32 patients. Patients with residual disease after debulking surgery had reduced overall survival (p = 0.043). The fPCI/ADC was negatively associated with overall survival when accounted for clinicopathological information with a hazard ratio of 1.254 for high fPCI/ADC (95% confidence interval, 1.007-1.560; p = 0.043). Conclusion: A high DWI-derived functional tumor burden was associated with decreased overall survival in patients with advanced OC.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -1
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• pp.145-148
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• 2002

In a network communication process, cryptographic algorithms play important role for secure process. This paper presents a new system architecture named "DCCS." This system can handle flexible operations of both cryptographic algorithms and the keys. For experimental evaluation, two representative cryptographic algorithms DES and Triple-DES are designed and implemented into an FPGA chip on the SEBSW-1. Then the developed board is confirmed to change its cryptographic algorithms dynamically. Also its throughput confirmed the ability of the real-time net-work use of the designed system.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 하계종합학술대회 논문집(2)
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• pp.254-257
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• 2000

In this paper, we propose a structure of the modified AAL. The ATM adaptation layer(AAL) is described in HDL and implemented in FPGA, which plays a role in receiving of HDTV TS packets over ATM networks. Also We designed the PCI interface module which is used for monitoring and analyzing the HDTV TS packets. The designed FPGA chip operates at 20 MHz.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(1)
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• pp.209-212
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• 2000

This paper discusses performance evaluation methodologies for wired/wireless Ethernet adaptors. This paper defines test cases for performance evaluation of LAN adaptor and its environments. Performance evaluation of LAN adaptor is mote complex as compared with interconnection devices such as Ethernet HUB and Ethernet switch, because its performance depends on the system on which the adaptor is plugged. Such dependencies include CUP type, RAM size, system bus architecture(PCI bus clock), etc.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.61-65
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• 2000

In this paper We have developed the high-speed controller for haptic control. The proposed controller is based on the PCI/FPGA technology which can calculate the real position and transmit the force data to device rapidly. The haptic system is composed of 6DOF force display device high-speed controller. The developed system will be used on constructing the dynamical virtual environment. To show the efficiency of our system we designed simulation program of force-reflecting. As the result of the experiment we found that the controller has much higher resolution than some other controller It is so efficient in a 1 PC-based system with 1[kHz] haptic interrupt cycle.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 D
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• pp.3034-3036
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• 2005

High speed PC-based digital I/O system, PCI-bus master and slave. set is developed, which features are distributed structure, input/output function interchangeability by switch settings, and high speed(20Mbps). Library and application software for a DIO system that have a secure and a convenient functionality are developed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 D
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• pp.3031-3033
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• 2005

High speed PC-based digital I/O system hardware, PCI-bus master and slave set is developed, which features are distributed structure, input/output function interchangeability by switch setting, high speed 20Mbps to update 1000 points in less than 1 ms, etc.

• Communications for Statistical Applications and Methods
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• 제6권1호
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• pp.77-88
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• 1999

A new measure of the process capability index(PCI) $\textit{C}_{cpk}$ is proposed that takes into account the proximity to the target value as well as process mean and process variation when we assessing process performance. using the semivariance estimators proposed by Choobineh and Branting (1986) and Josephy and Aczel (1993) the estimator($\textit{C}_{cpk}$) of new index has been solved and the properties of these estimators have been examined through simulations. Also we compare the performance between $\textit{C}_{cpk}$ and $\textit{C}_{jpk}$ which is developed by Johnson kotz and Pearn(1992).

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.799-802
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• 2003

In this paper a FPGA implementation of WEP protocol is described. IEEE 802.11 specifies a wired LAN equivalent data confidentiality algorithm. WEP(Wired Equivalent Privacy) is defined as protecting authorized users of a wireless LAN from casual eavesdropping. WEP use RC4 algorithm for data encryption and decryption, also it use CRC-32 algorithm for error detection. The WEP protocol is implemented using Xilinx VirtexE XCV1000E-6HQ240C FPGA chip with PCI bus interface.