• Title/Summary/Keyword: PCB assembly

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Solder Region Detection and Height Calculation by the Characteristics and Phase Difference of the 3D Profiles in Moire Images (모아레 영상에서 3차원 형상정보의 특성과 위상차에 의한 솔더영역 검출 및 높이 계산)

  • Song, Jun Ho;Rhee, Eun Joo
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.8
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    • pp.5269-5279
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    • 2014
  • The cause of defects in the PCB SMT assembly is mostly solder paste deposits. Conventional inspection methods for solder paste deposits suffer from slow speed, low reliability and high cost. Therefore, this paper proposes a method for calculating the height and region of solder paste on PCB using the 3D profiles without measuring the 2D image. The solder paste region is detected by the phase difference in the measurement points and the average phase on the whole surface of PCB. The high reliable height of the solder paste region is computed by the average of the measurement points' phase with repeatability and reliability. The experimental results revealed improvements of 17% in inspection time and 29% repeatability in the height calculation of the solder paste region, resulting in a high speed and less expensive system.

Study of the Damage Property of a Contacted Indent by Finite Element Method (유한요소해석에 의한 압입 접촉손상 특성 연구)

  • Cho, Jae-Ung;Kim, Choon-Sik;Lee, Hee-Sung;Kim, Young-Choon
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.10
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    • pp.5974-5979
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    • 2014
  • Lightweight parts with very uniform precision are manufactured by an indent method and the press technique has been improved. Upon assembly with an indent method, a deformation force due to the compressive force occurs between the pin and hole and the contact surface is affected by damage. Therefore, a 3 dimensional model was made using the CATIA program and the damage on the surface contacted with indent was estimated through the ANSYS program in this study. In the analysis result, the maximum load applied at the PCB plate was 21.3 N when the pin goes through the PCB plate. When PCB plate came out of the pin, the maximum load was 19.24 N. As the structural analysis result, the maximum equivalent stress of Pin 1 was 192.96MPa because the maximum stress occurs at Pin 1 among all parts of this study model. By examining the damage property of the contacted indent and applying this study result to the design of real indentation, the damage can be prevented and the durability can be estimated.

Analysis of Causes PCB Failure for Collective Protection Equipment and Improvement of Quality (집단보호장비 내의 회로카드조립체 고장 원인 분석 및 품질 향상)

  • Pak, Se-Jin;Ki, Sang-Sik
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.20 no.5
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    • pp.87-92
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    • 2019
  • This study is the analysis of causes of printed circuit board (PCB) in collective protection equipment failure and quality improvement. The equipment is a component of the weapon system currently in operation and serves to defend against enemy chemical and biological attack as well as heating and cooling functions. However, during operation in the military, fans of condensate assembly failed to operate. The cause of the failure is the burning of PCB. It was found that the parts were heated according to the continuous cooling operation under the high temperature environmental conditions. Accordingly, the electronic components exposed to high temperature were deteriorated and destroyed. To solve this problem, PCB apply to heatsink. The performance test of improved PCB has been completed. Futhermore system compatibility, positive pressure maintenance and noise test were performed. This improvement confirmed that no faults have occurred in PCB so far. Therefore, the quality of the equipment has improved.

Effects of Underfills on the Dynamic Bending Reliability of Ball Grid Array Board Assembly (Ball Grid Array 보드 어셈블리의 동적굽힘 신뢰성에 미치는 언더필의 영향)

  • Jang, Jae-Won;Bang, Jung-Hwan;Yoo, Se-Hoon;Kim, Mok-Soon;Kim, Jun-Ki
    • Korean Journal of Materials Research
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    • v.21 no.12
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    • pp.650-654
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    • 2011
  • In this paper, the effects of conventional and newly developed elastomer modified underfill materials on the mechanical shock reliability of BGA board assembly were studied for application in mobile electronics. The mechanical shock reliability was evaluated through a three point dynamic bending test proposed by Motorola. The thermal properties of the underfills were measured by a DSC machine. Through the DSC results, the curing condition of the underfills was selected. Two types of underfills showed similar curing behavior. During the dynamic bending reliability test, the strain of the PCB was step increased from 0.2% to 1.5% until the failure circuit was detected at a 50 kHz sampling rate. The dynamic bending reliability of BGA board assembly using elastomer modified underfill was found to be superior to that of conventional underfill. From mechanical and microstructure analyses, the disturbance of crack propagation by the presence of submicron elastomer particles was considered to be mainly responsible for that result rather than the shear strength or elastic modulus of underfill joint.

Improvement of COF Bending-induced Lead Broken Failure in LCD Module (LCD Module내 COF Bending에 따른 Lead Broken Failure의 개선)

  • Shim, Boum-Joo;Choi, Yeol;Yi, Jun-Sin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.21 no.3
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    • pp.265-271
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    • 2008
  • TCP(Tape Carrier Package), COG (Chip On Glass), COF(Chip On Film) are three methods for connecting LDI(LCD Driver IC) with LCD panels. Especially COF is growing its portion of market place because of low cost and fine pitch correspondence. But COF has a problem of the lead broken failure in LCD module process and the usage of customer. During PCB (Printed Circuit Board) bonding process, the mismatch of the coefficient of thermal expansion between PCB and D-IC makes stress-concentration in COF lead, and also D-IC bending process during module assembly process makes the level of stress in COF lead higher. As an affecting factors of lead-broken failure, the effects of SR(Solder Resister) coating on the COF lead, surface roughness and grain size of COF lead, PI(Polyimide) film thickness, lead width and the ACF(Anisotropic Conductive Film) overlap were studied, The optimization of these affecting manufacturing processes and materials were suggested and verified to prevent the lead-broken failure.

A Study on the Improvement of High Temperature Bonding Performance of LCD Panel Bonding Equipment (LCD 패널 압착장비의 고온압착성능 개선에 관한 연구)

  • Hwang, Il-Kwon;Kim, Dong-Min;Chae, Soo-Won
    • Journal of the Korean Society for Precision Engineering
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    • v.27 no.12
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    • pp.84-91
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    • 2010
  • The bonding process of LCD panel is attaching an inner lead to an outer lead in the production line of LCD panel module. It is composed of an OLB process and a PCB bonding process. Since bonding tool assembly is one of the core parts of the bonding equipment that determines the durability and performance of the final product, much design efforts to enhance uniformity and efficiency of the process have been made. In this paper, FE analyses have been employed to determine the bonding tool size. Bonding tool of long bar shape has been simplified as a piece with same heater pitch, and appropriate boundary conditions such as convection and radiation are considered. Thermal analysis results by the FEM have been validated by the experiments. With the use of FE analysis varies design parameters and the corresponding effects have been evaluated. It was observed that the approach presented in this paper could be employed for the design of LCD module bonding tool.

A Gerber-Character Recognition System with Multiple Recognizers and a Verifier (다중 인식기 및 검증기를 갖는 거버문자 인식 시스템)

  • Oh, Hye-Won;Park, Tae-Hyoung
    • Journal of the Korean Institute of Intelligent Systems
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    • v.14 no.1
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    • pp.20-27
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    • 2004
  • We propose the character recognition system for Gerber files. The Gerber file is the vector-formatted drawing file for PCB manufacturing, which includes various symbols, figures and characters. Also, the characters are written in horizontal, vertical, and reverse-vortical directions. In this paper, we newly propose the Gerber-character recognition system to recognize all of component names located in PCB. To improve the performance, we develop the multiple recognizers by neural networks and the verifier considering the structural features. The developed system has been installed to the auto-programming software for PCB assembly and inspection machines.

A Study on efficient PCB assembly (PCB의 효율적 조립 방법에 관한 연구)

  • Mun Gi Ju;Jeong Hyeon Cheol;Heo Ji Hui
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2003.05a
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    • pp.741-743
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    • 2003
  • A surface mount machine operation policy to assemble printed circuit boards is being developed in this research. The policy includes how to assign electronic components to slots on a component rack, and how to determine placement sequences on printed circuit board. The suggested heuristic uses information about component types and closeness relationships in each component on the board to assemble. First, the size of components and closeness ratings are used to divide them into two different size groups. Then rack assignment and placement routes are developed using component type and quantity information for a small size group, and followed by a large size group. Simulation models are developed using Visual C++ for performance evaluation of the heuristic. Necessary statistical analyses are provided to show the effectiveness of the suggested heuristic.

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Automatic Assembly and Inspection (조립 및 검사 자동화)

  • 고광일
    • Journal of the KSME
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    • v.34 no.2
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    • pp.112-117
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    • 1994
  • 최근의 전자기기는 반도체 기술의 급속한 발전에 따라 소형화, 고기능화 및 다양화 뿐만 아니라 경박단소화되는 추세에 있다. 이러한 시장의 요구에 대응하여 표면실장용 전자부품이 등장하여 그 사용이 점차증가하고 있고 여기에 발맞춰 국내 . 외 전자기기 제조업체가 제품내의 PCB를 SMD화하는 추세에 있다. 따라서 표면실장 부품의 조립을 위한 고밀도, 고정도의 실장기술의 개발이 요구되고 있다. 또한 부품 자동삽입 등 기존의 방법들로 조립된, 전자기기 내부에 사용 되는 PCB의 조립상태 및 각 부품의 특성들을 검사하기 위한 In-circuit Tester의 기술도 빠른 속도로 발전하여 자동화되어가고 있는 추세에 있다. 이에 따라 본 연구소에서는 '90년에 능 Mounter GCA-M2000 모델을 개발 완료하였고 현재 관련 사업부에서 양산중에 있으며, 아날로그 방식 및 디지털 방식의 In-circuit Tester 모델도 개발 완료하여 현재 양산 중에 있다. 이 지면을 빌어 소개할 기회를 갖고자 한다.

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An Assignment-Balance-Optimization Algorithm for Minimizing Production Cycle Time of a Printed Circuit Board Assembly Line

  • Lee, Sang-Un
    • Journal of the Korea Society of Computer and Information
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    • v.21 no.2
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    • pp.97-103
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    • 2016
  • This paper deals with the cycle time minimization problem that determines the productivity in printed circuit board (PCB) with n components using the m placement machines. This is known as production cycle time determination problem (PCTDP). The polynomial time algorithm to be obtain the optimal solution has been unknown yet, therefore this hard problem classified by NP-complete. This paper gets the initial assignment result with the machine has minimum unit placement time per each component firstly. Then, the balancing process with reallocation from overhead machine to underhead machine. Finally, we perform the swap optimization and get the optimal solution of cycle time $T^*$ within O(mn) computational complexity. For experimental data, the proposed algorithm can be obtain the same result as integer programming+branch-and-bound (IP+B&B) and B&B.