• Journal of Broadcast Engineering
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• v.7 no.2
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• pp.153-167
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• 2002

With the advent of digital broadcasting, a large number of program channels become available at the user terminals such as set-top-box or PC. Channel navigation and searching become more difficult at TV terminal sides using a conventional device such as a TV remote controller. The MPEG-7 MDS (Multimedia Description Scheme) and TV Anytime set up a standard about how to describe user preferences for genre, channel, actor/actress, keyword, etc. of the TV programs, and how to describe usage history for user's program consumption behaviors and preferences. But they do not describe how to use them. In this paper, we describe an IPG (Intelligent Program Guider) system that provides TV program and channel information based on user preferences and suggest easy access to TV program that user wants. The IPG monitors user's behaviors of interacting to programs and automatically updates the user's preference changes according1y. The IPG utilizes user preferences description scheme specified in both MPEG-7 MDS and TV Anytime metadata specifications.

• Journal of the Korean Society for Precision Engineering
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• v.21 no.4
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• pp.194-201
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• 2004

Optical fibers are indispensable fer optical communication systems that transmit large volumes of data at high speed. But the aligning technology under the sub-micron accuracy is required for the precise axis adjustment and connection. For the purpose of precise alignment of the optical arrays, in this research, we have developed the 12-axis(with 8 automated axis and 4 manual axis) automatic optical fiber alignment system including the image processing-based searching system, the automatic loading system using the robot and the suction toot and the automatic UV bonding system. In order to obtain the sub-micron alignment accuracy, two 4-axis PC-based motion controllers and the two 50nm resolution 6-aixs micro-stage actuated by micro stepping motors are adopted. The fiber aligning procedure consists of two steps. Firstly, the optical wave guide and an input optical array are aligned by the 6-axis input micro-stage with the IR camera. The image processing technique is introduced to reduce primary manual aligning time and result in achieving the 50% decrease of aligning time. Secondly, the IR camera is replaced by the output micro-stage and a wave guide and two optical arrays are aligned simultaneously before the laser power intensity delivered to the optical powermeter reached the threshold value. When the aligning procedure is finished, the wave guide and arrays are W bonded. The automatic loading/unloading system is also introduced and the entire wave guide handing time is reduced significantly compared to the former commercial aligning system.

• Journal of IKEEE
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• v.18 no.4
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• pp.552-558
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• 2014

This paper suggests how to design a ZigBee-chip-based communication module to remotely measure radiation level. The suggested communication module consists of two control processors for the chip as generally required to configure a ZigBee system, and one chip module to configure a ZigBee RF device. The ZigBee-chip-based communication module for remote radiation measurement consists of a wireless communication controller; sensor and high-voltage generator; charger and power supply circuit; wired communication part; and RF circuit and antenna. The wireless communication controller is to control wireless communication for ZigBee and to measure radiation level remotely. The sensor and high-voltage generator generates 500 V in two consecutive series to amplify and filter pulses of radiation detected by G-M Tube. The charger and power supply circuit part is to charge lithium-ion battery and supply power to one-chip processors. The wired communication part serves as a RS-485/422 interface to enable USB interface and wired remote communication for interfacing with PC and debugging. RF circuit and antenna applies an RLC passive component for chip antenna to configure BALUN and antenna impedance matching circuit, allowing wireless communication. After configuring the ZigBee-chip-based communication module, tests were conducted to measure radiation level remotely: data were successfully transmitted in 10-meter and 100-meter distances, measuring radiation level in a remote condition. The communication module allows an environment where radiation level can be remotely measured in an economically beneficial way as it not only consumes less electricity but also costs less. By securing linearity of a radiation measuring device and by minimizing the device itself, it is possible to set up an environment where radiation can be measured in a reliable manner, and radiation level is monitored real-time.

• Journal of the Korea Society of Computer and Information
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• v.20 no.3
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• pp.115-124
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• 2015

In this paper we analyse the previous (Quality of Services) and QoE(Quality of Experience) methods, and propose a high reliable network system framework and its service forwarding method that is able to provide seamless N-Screen services for proliferating disaster informations. The service satisfaction measurement, i.e., QoE, of contents consumers in N-screens services is going to be important the factor in disaster information proliferation because N-Screen services in the previous methods based on multi devices only focused on information transmission. The proposed system around these services is composed of a disaster information process framework for accepting user's service requirement, push service modules for minimizing the number of packets to be caused when carrying out the push service, and a push service controller for maximizing QoE measures. In order to provide a seamless N-Screen service on diverse screens, such as smartphone, PC, and big screen, we also have Open API(Application Programming Interface) functions. Through these results, we expect to evaluate QoS and QoE quality in the seamless N-Screen service.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.7
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• pp.1332-1339
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• 2001

SoC(System on Chip) technology is widely used in the field of embedded systems by providing high flexibility for a specific application domain. An important aspect of development any new embedded system is verification which usually requires lengthy software and hardware co-design. To reduce development cost of design effort, the instruction set of microprocessor must be suitable for a high level language compiler. And FPGA prototype system could be derived and tested for design verification. In this paper, we propose a 16 bit FPGA microprocessor, which is tentatively-named EISC16, based on an EISC(Extendable Instruction Set Computer) architecture for embedded applications. The proposed EISC16 has a 16 bit fixed length instruction set which has the short length offset and small immediate operand. A 16 bit offset and immediate operand could be extended using by an extension register and an extension flag. We developed a cross C/C++ compiler and development software of the EISC16 by porting GNU on an IBM-PC and SUN workstation and compared the object code size created after compiling a C/C. standard library, concluding that EISC16 exhibits a higher code density than existing 16 microprocessors. The proposed EISC16 requires approximately 6,000 gates when designed and synthesized with RTL level VHDL at Xilinix's Virtex XCV300 FPGA. And we design a test board which consists of EISC16 ROM, RAM, LED/LCD panel, periodic timer, input key pad and RS-232C controller. 11 works normally at 7MHz Clock.

• Journal of the Optical Society of Korea
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• v.20 no.6
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• pp.716-721
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• 2016

A single-and dual-wavelength switchable polarized Yb-doped double-clad fiber laser around 1120 nm based on a pair of fiber Bragg gratings (FBGs) is demonstrated. The polarization-maintaining (PM) linear cavity is composed of a double clad PM Yb-doped fiber (YDF) and a pair of PM FBGs. The laser can operate in stable dual-wavelength or wavelength-switching modes due to the polarization hole burning (PHB) and the spatial hole burning (SHB) enhanced by the PM linear cavity. In dual-wavelength operation, the two orthogonally polarized wavelengths are centered at 1118.912 nm and 1119.152 nm, with an interval of 0.24 nm and a signal to noise ratio (SNR) of 35 dB. The maximum output power is 14.67 W when the launched LD pump is 24 W corresponding to an optical efficiency of 61.1%. The lasing lines switchover may be realized by adjusting the polarization controller (PC) fitted in the cavity. The two single-wavelengths are 1118.912 nm and 1119.152 nm. When the injected LD pump is 24 W, the highest output powers are 7.68 W and 8.64 W corresponding to optical efficiencies of 32% and 36% respectively. The spectral linewidth of the lasing lines are 0.075 nm and 0.07 nm, and the average numerical values of PER aredB and 19.9 dB, respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.2
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• pp.259-266
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• 2021

USB bus not only works with convenience but also transmits data fast and becomes a standard peripheral interface between FPGA development board and personal computer. In this paper FPGA verification system with slave FIFO interface for Cypress FX3 USB 3 bridge chip was implemented. The designed slave FIFO interface consists of host interface module based on FIFO structure, master bus controller and command decoder and supports streaming communication interface for FX3 bridge chip and memory-mapped input and output interface for user design circuit. The ZestSC3 board with Cypress FX3 USB 3 bridge chip and Xilinx Artix FPGA(XC7A35T-1C5G3241) was used to implement FPGA verification system. It was verified that the FPGA verification system for user design circuit operated correctly under various clock frequencies using GUI software developed by visual C# and C++ DLL. The designed slave FIFO interface for FPGA verification system has modular structure and can be applicable to the different user designs with memory-mapped I/O interface.

• Journal of Biomedical Engineering Research
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• v.25 no.4
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• pp.269-275
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• 2004

Different biological tissues have different values of electrical resistivity. In EIT (electrical impedance tomography), we try to provide cross-sectional images of a resistivity distribution inside an electrically conducting subject such as the human body mainly for functional imaging. However, it is well known that the image reconstruction problem in EIT is ill-posed and the quality of a reconstructed image highly depends on the measurement error. This requires us to develop a high-performance EIT system. In this paper, we describe the development of a 16-channel digital EIT system including a single constant current source, 16 voltmeters, main controller, and PC. The system was designed and implemented using the FPGA-based digital technology. The current source injects 50KHz sinusoidal current with the THD (total harmonic distortion) of 0.0029% and amplitude stability of 0.022%. The single current source and switching circuit reduce the measurement error associated with imperfect matching of multiple current sources at the expense of a reduced data acquisition time. The digital voltmeter measuring the induced boundary voltage consists of a differential amplifier, ADC, and FPGA (field programmable gate array). The digital phase-sensitive demodulation technique was implemented in the voltmeter to maximize the SNR (signal-to-noise ratio). Experimental results of 16-channel digital voltmeters showed the SNR of 90dB. We used the developed EIT system to reconstruct resistivity images of a saline phantom containing banana objects. Based on the results, we suggest future improvements for a 64-channel muff-frequency EIT system for three-dimensional dynamic imaging of bio-impedance distributions inside the human body.

• Journal of Software Assessment and Valuation
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• v.16 no.1
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• pp.65-79
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• 2020

As Programmable Logic Controllers (PLCs), popular components in industrial control systems (ICS), are incorporated with the technologies such as micro-controllers, real-time operating systems, and communication capabilities. As the latest PLCs have been connected to the Internet, they are becoming a main target of cyber threats. This paper proposes two sanitizers that improve the security of uC/OS-II based firmware for a PLC. That is, we devise BU sanitizer for detecting out-of-bounds accesses to buffers and UaF sanitizer for fixing use-after-free bugs in the firmware. They can sanitize the binary firmware image generated in a desktop PC before downloading it to the PLC. The BU sanitizer can also detect the violation of control flow integrity using both call graph and symbols of functions in the firmware image. We have implemented the proposed two sanitizers as a prototype system on a PLC running uC/OS-II and demonstrated the effectiveness of them by performing experiments as well as comparing them with the existing sanitizers. These findings can be used to detect and mitigate unintended vulnerabilities during the firmware development phase.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.6
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• pp.57-65
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• 2007

This paper presents the design of single phase PFC(Power Factor Correction) using a DSP(TMS320F2812). In order to realize the proposed boost PFC converter in average current mode control, the DSP requires the A/D sampling values for a line input voltage, a inductor current, and the output voltage of the converter. Because of a FET switching noise, these sampling values contain a high frequency noise and switching ripple. The solution of A/D sampling keeps away from the switching point. Because the PWM duty is changed from 5% to 95%, we can#t decide a fixed sampling time. In this paper, the three A/D converters of the DSP are started using the prediction algorithm for the FET ON/OFF time at every sampling cycle(40 KHz). Implemented A/D sampling algorithm with only one timer of the DSP is very simple and gives the autostart of these A/D converters. From the experimental result, it was shown that the power factor was about 0.99 at wide input voltage, and the output ripple voltage was smaller than 5 Vpp at 80 Vdc output. Finally the parameters and gains of PI controllers are controlled by serial communication with Windows Xp based PC. Also it was shown that the implemented PFC converter can achieve the feasibility and the usefulness.