• 전력전자학회논문지
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• 제9권5호
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• pp.457-466
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• 2004

본 논문에서는 태양광 컨버터로서 변형된 벅-부스트 컨버터를 제안하고 분석하며, 출력을 증가시키고 출력전압의 리플을 저감하기 위한 새로운 병렬 구동 기법을 제안한다. 변형된 컨버터의 입ㆍ출력 관계는 기존의 승압형 컨버터인 부스트 컨버터와 동일하지만, 출력단자의 구성을 변형시켜 출력 콘덴서의 동작전압과 커패시턴스 용량을 저감시킬 수 있는 장점을 가진다. 또한 변형된 컨버터와 전류 제어 기법을 이용하는 제안된 병렬구동 기법은 기존병렬 구동 방식의 전류 분배에 대한 불평등 문제를 해결할 수 있으며, 부가적인 스위칭 손실의 증가 없이 등가 스위칭 주파수를 증가 시킬 수 있어 출력전압 리플 저감에 효과적이다. 제안된 병렬 구동 기법의 타당성을 컴퓨터 시뮬레이션과 실험을 통하여 입증한다.

• Journal of Power Electronics
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• 제13권5호
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• pp.787-797
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• 2013

Despite the advantages offered by multilevel inverters, one of the main drawbacks that prevents their widespread use is their circuit complexity as the number of power switches employed is usually high. This paper presents a new multilevel inverter topology with a considerable reduction in the number of power switches used through the switch-sharing approach. The fact that the proposed inverter applies two bidirectional power switches for sharing among the three phases does not prevent it from producing seven levels in the line-to-line output voltage waveforms. A modified scheme of space vector modulation via the application of virtual voltage vectors is developed to generate the PWM signals of the power switches. The performance of the proposed inverter is investigated through MATLAB/SIMULINK simulations and is practically tested using a laboratory prototype with a DSP-based modulator. The results demonstrate the satisfactory performance of the inverter and verify the effectiveness of the modulation method.

• 전력전자학회논문지
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• 제9권4호
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• pp.326-333
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• 2004

본 논문에서는 Power-MOSFET를 통해 L및 C로 링크된 2조의 공진형 Full-bridge 인버터 회로를 다중 결합하여 대용량 전력변환장치의 소자에 인가되는 전압이나 부하전류를 분산 제어하는 기법을 제안하고 있다. 이 방식은 두 조의 인버터가 시분할로 구동되기 때문에 각 인버터의 독립된 출력이 부하단에서 합성되어 전력이 공급된다. 출력제어 기법은 시분할 합성법을 사용하고 이에 따른 인버터의 회로동작 모드를 분석하고 해석하였으며, 시뮬레이션을 통한 이론적 해석결과를 검정하고 이를 실험을 통해 비교 고찰하였다.

• Journal of Power Electronics
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• 제9권2호
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• pp.300-307
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• 2009

In this paper, design and control is proposed for a four input-series-output-series-connected ZVS full bridge converter for the photovoltaic power conditioning system (PCS). The novel topology for a photovoltaic (PV) DC/DC converter that can dramatically reduce the power rating and increase the efficiency of a PV system by analyzing PV module characteristics is proposed. The control scheme, including an input voltage controller is proposed to achieve equal sharing of the input voltage as well output voltages by a four series connected module. Design methods for ZVS power stage are also introduced. The total PV system is implemented for a 250-kW PV power conditioning system (PCS). This system has only three DC/DC converters with a 25-kW power rating and uses only one-third of the total PV PCS power. The 25-kW prototype PV DC/DC converter is introduced to verify experimentally the proposed topology. In addition, an experimental result shows that the proposed topology exhibits good performance.

• 대한전자공학회논문지SD
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• 제41권5호
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• pp.99-105
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• 2004

더미 비트라인을 이용한 공유 커패시터 전하공유 롬(shared-capacitor charge-sharing ROM SCCS-ROM)이 제안되었다. SCCS-ROM은 기존의 전하공유 롬(charge-sharing ROM, CS-ROM)의 전하공유 기법으로 비트라인의 스윙전압을 줄였다. CS-ROM에서는 출력 비트 마다 3개의 작은 커패시턴스들이 필요하지만, 제안된 SCCS-ROM은 그 커패시터들을 공유함으로써 필요한 커패시터의 수를 단지 3개로 줄였다. 또한, 더미 비트라인들(dummy bit lines)로 커패시터들을 구현함으로써, 잡음내성을 증가시켰을 뿐만 아니라 소모전력 또한 줄였다. 8K×15bi1s의 SCCS-ROM이 0.35㎛ CMOS 공정으로 구현되었다. SCCS-ROM은 3.3V의 100㎒ 동작에서 8.63㎽의 전력을 소모하였다. 시뮬레이션에서 SCCS-ROM은 CS-ROM보다 8.4% 적은 전력을 소모하였다.

• Journal of KIEE
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• 제10권1호
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• pp.35-42
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• 2000

An equivalent load sharing control based on the frequency and voltage droop concept for parallel operation of two three-phase Uninterruptible Power Supply (UPS) systems with no control interconnection lines is presented in this paper. First of all, due to the use of active power and reactive power as control variables, the characteristics of output powers according to amplitude and phase differences between output voltages of two UPS systems are analyzed. Secondly, simulation results under different line impedance demonstrate the feasibility of the wireless parallel operation control. Finally, experiments are presented to verify the theoretical discussion with two three-phase 20kVA UPS systems employed TMS320C32, a kind of real time digital signal processor (DSP).

• Journal of Power Electronics
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• 제15권3호
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• pp.741-752
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• 2015

This study proposes a new solution for the parallel operation of microgrid inverters in terms of circuit topology and control structure. A combined three-phase four-wire inverter composed of three single-phase full-bridge circuits is adopted. Moreover, the control structure is based on adaptive three-order sliding-mode control and wireless load-sharing control. The significant contributions are as follows. 1) Adaptive sliding-mode control performance in inner voltage loop can effectively reject both voltage and load disturbances. 2) Virtual resistive-output-impedance loop is applied in intermediate loop to achieve excellent power-sharing accuracy, and load power can be shared proportionally to the power rating of the inverter when loads are unbalanced or nonlinear. 3) Transient droop terms are added to the conventional power outer loop to improve dynamic response and disturbance rejection performance. Finally, theoretical analysis and test results are presented to validate the effectiveness of the proposed control scheme.

• 전력전자학회논문지
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• 제25권3호
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• pp.235-241
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• 2020

In this paper, we propose the bus/bypass synchronization phase lock loop (B-Sync PLL) method using each phase voltage controller of a parallel UPS inverter. The B-Sync PLL included in each phase voltage control system of parallel UPS inverters has the transient response and the phase synchronization error at grid normal or blackout. The validity of this method is verified by simulation and experiment. As a result, the parallel UPS inverters using the proposed method confirmed that the output phase was continuously synchronized when a grid blackout, improving the transient response characteristics for stable load power supply and equal load sharing.

• Journal of Power Electronics
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• 제15권6호
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• pp.1429-1437
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• 2015

A new parallel hybrid soft switching converter with low circulating current losses during the freewheeling state and a low output current ripple is presented in this paper. Two circuit modules are connected in parallel using the interleaved pulse-width modulation scheme to provide more power to the output load and to reduce the output current ripple. Each circuit module includes a three-level converter and a half-bridge converter sharing the same lagging-leg switches. A resonant capacitor is adopted on the primary side of the three-level converter to reduce the circulating current to zero in the freewheeling state. Thus, the high circulating current loss in conventional three-level converters is alleviated. A half-bridge converter is adopted to extend the ZVS range. Therefore, the lagging-leg switches can be turned on under zero voltage switching from light load to full load conditions. The secondary windings of the two converters are connected in series so that the rectified voltage is positive instead of zero during the freewheeling interval. Hence, the output inductance of the three-level converter can be reduced. The circuit configuration, operation principles and circuit characteristics are presented in detail. Experiments based on a 1920W prototype are provided to verify the effectiveness of the proposed converter.

• Journal of Electrical Engineering and Technology
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• 제8권1호
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• pp.137-143
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• 2013

This paper presents development of variable speed generation (VSG) system with energy saving function. The rubber tyred gantry crane (RTGC) requires the power from diesel-engine. Significant fuel savings by reducing the engine speed can be achieved, because all of operation modes except hoisting are required lower power than rated value of engine. When low speed operation output voltage of generator is decrease until acceptable range of motor driver inverters and auxiliary load supplier. According to power demand engine speed is varying from 20 to 60Hz, and voltage is varying between 210Vac and 480Vac. When idle mode or low power operation dc/dc converter operates by constant output voltage control and inverters dc site voltage is compensated by it. This paper proposed 3-phase interleaved boost converter which has the same structure as the commercially available 3-phase inverter and current sharing capability. 400kW interleaved converter is designed and a performance of converter is evaluated through several experiments with a RTGC system. Energy saving VSG system can cut down fuel consumption by 36% and 21.3% at idle and unidirectional load operations.