• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.5
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• pp.457-466
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• 2004

In this paper, a modified converter is presented and analyzed to use as a photovoltaic converter. And also a new parallel driving scheme is proposed to increase output power and to reduce the output voltage ripple. The ratio of the output to the input voltage of the modified converter is equal to that of the boost converter. The difference between both converters is the composition of output terminal. Owing to the discrepancy, a working voltage of the output capacitor of the modified converter becomes lower, thus the capacitance value of the capacitor can be smaller than that of the boost converter. The proposed parallel driving is based on the modified converter and a current-mode-control method. It gives a good solution for alleviating the current sharing unbalance problem of conventional parallel operations. It reduces the output voltage ripple by means of increasing the equivalent switching frequency without additional switching losses. The validity of the proposed parallel driving strategy is verified through computer-aided simulations and experimental results.

• Journal of Power Electronics
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• v.13 no.5
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• pp.787-797
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• 2013

Despite the advantages offered by multilevel inverters, one of the main drawbacks that prevents their widespread use is their circuit complexity as the number of power switches employed is usually high. This paper presents a new multilevel inverter topology with a considerable reduction in the number of power switches used through the switch-sharing approach. The fact that the proposed inverter applies two bidirectional power switches for sharing among the three phases does not prevent it from producing seven levels in the line-to-line output voltage waveforms. A modified scheme of space vector modulation via the application of virtual voltage vectors is developed to generate the PWM signals of the power switches. The performance of the proposed inverter is investigated through MATLAB/SIMULINK simulations and is practically tested using a laboratory prototype with a DSP-based modulator. The results demonstrate the satisfactory performance of the inverter and verify the effectiveness of the modulation method.

• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.4
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• pp.326-333
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• 2004

This research proposes a high frequency resonant inverter for high power conversion apparatus, which is consist of two L-C linked full-bridge inverter using MOSFET in order to distribute voltage and current of the devices. As an output power control strategy, the time sharing control method is applied. From the computer simulation results, the inverters and devices can be shared properly voltage and current rating of the system. And also, theoretical characteristics of the proposed circuit are compared with experimental results.

• Journal of Power Electronics
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• v.9 no.2
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• pp.300-307
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• 2009

In this paper, design and control is proposed for a four input-series-output-series-connected ZVS full bridge converter for the photovoltaic power conditioning system (PCS). The novel topology for a photovoltaic (PV) DC/DC converter that can dramatically reduce the power rating and increase the efficiency of a PV system by analyzing PV module characteristics is proposed. The control scheme, including an input voltage controller is proposed to achieve equal sharing of the input voltage as well output voltages by a four series connected module. Design methods for ZVS power stage are also introduced. The total PV system is implemented for a 250-kW PV power conditioning system (PCS). This system has only three DC/DC converters with a 25-kW power rating and uses only one-third of the total PV PCS power. The 25-kW prototype PV DC/DC converter is introduced to verify experimentally the proposed topology. In addition, an experimental result shows that the proposed topology exhibits good performance.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.5
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• pp.99-105
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• 2004

A shared-capacitor charge-sharing ROM (SCCS-ROM) using dummy bit lines is proposed. The SCCS-ROM reduces the bit line swing voltage using the charge-sharing technique of the conventional charge-sharing ROM (CS-ROM). Although the CS-ROM needs three small capacitors per output bit, the proposed SCCS-ROM shares the capacitors so that it needs only three capacitors. The SCCS-ROM implements the capacitors using dummy bit lines. This not only increases noise immunity but also reduces power. A SCCS-ROM with 8K${\times}$15bits implemented in a 0.35${\mu}{\textrm}{m}$ CMOS process. The SCCS-ROM consumes 8.63㎽ at 100MHz with 3.3V The simulation results show that the SCCS-ROM reduces 8.4% power compared to the CS-ROM.

• Journal of KIEE
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• v.10 no.1
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• pp.35-42
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• 2000

An equivalent load sharing control based on the frequency and voltage droop concept for parallel operation of two three-phase Uninterruptible Power Supply (UPS) systems with no control interconnection lines is presented in this paper. First of all, due to the use of active power and reactive power as control variables, the characteristics of output powers according to amplitude and phase differences between output voltages of two UPS systems are analyzed. Secondly, simulation results under different line impedance demonstrate the feasibility of the wireless parallel operation control. Finally, experiments are presented to verify the theoretical discussion with two three-phase 20kVA UPS systems employed TMS320C32, a kind of real time digital signal processor (DSP).

• Journal of Power Electronics
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• v.15 no.3
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• pp.741-752
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• 2015

This study proposes a new solution for the parallel operation of microgrid inverters in terms of circuit topology and control structure. A combined three-phase four-wire inverter composed of three single-phase full-bridge circuits is adopted. Moreover, the control structure is based on adaptive three-order sliding-mode control and wireless load-sharing control. The significant contributions are as follows. 1) Adaptive sliding-mode control performance in inner voltage loop can effectively reject both voltage and load disturbances. 2) Virtual resistive-output-impedance loop is applied in intermediate loop to achieve excellent power-sharing accuracy, and load power can be shared proportionally to the power rating of the inverter when loads are unbalanced or nonlinear. 3) Transient droop terms are added to the conventional power outer loop to improve dynamic response and disturbance rejection performance. Finally, theoretical analysis and test results are presented to validate the effectiveness of the proposed control scheme.

• The Transactions of the Korean Institute of Power Electronics
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• v.25 no.3
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• pp.235-241
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• 2020

In this paper, we propose the bus/bypass synchronization phase lock loop (B-Sync PLL) method using each phase voltage controller of a parallel UPS inverter. The B-Sync PLL included in each phase voltage control system of parallel UPS inverters has the transient response and the phase synchronization error at grid normal or blackout. The validity of this method is verified by simulation and experiment. As a result, the parallel UPS inverters using the proposed method confirmed that the output phase was continuously synchronized when a grid blackout, improving the transient response characteristics for stable load power supply and equal load sharing.

• Journal of Power Electronics
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• v.15 no.6
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• pp.1429-1437
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• 2015

A new parallel hybrid soft switching converter with low circulating current losses during the freewheeling state and a low output current ripple is presented in this paper. Two circuit modules are connected in parallel using the interleaved pulse-width modulation scheme to provide more power to the output load and to reduce the output current ripple. Each circuit module includes a three-level converter and a half-bridge converter sharing the same lagging-leg switches. A resonant capacitor is adopted on the primary side of the three-level converter to reduce the circulating current to zero in the freewheeling state. Thus, the high circulating current loss in conventional three-level converters is alleviated. A half-bridge converter is adopted to extend the ZVS range. Therefore, the lagging-leg switches can be turned on under zero voltage switching from light load to full load conditions. The secondary windings of the two converters are connected in series so that the rectified voltage is positive instead of zero during the freewheeling interval. Hence, the output inductance of the three-level converter can be reduced. The circuit configuration, operation principles and circuit characteristics are presented in detail. Experiments based on a 1920W prototype are provided to verify the effectiveness of the proposed converter.

• Journal of Electrical Engineering and Technology
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• v.8 no.1
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• pp.137-143
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• 2013

This paper presents development of variable speed generation (VSG) system with energy saving function. The rubber tyred gantry crane (RTGC) requires the power from diesel-engine. Significant fuel savings by reducing the engine speed can be achieved, because all of operation modes except hoisting are required lower power than rated value of engine. When low speed operation output voltage of generator is decrease until acceptable range of motor driver inverters and auxiliary load supplier. According to power demand engine speed is varying from 20 to 60Hz, and voltage is varying between 210Vac and 480Vac. When idle mode or low power operation dc/dc converter operates by constant output voltage control and inverters dc site voltage is compensated by it. This paper proposed 3-phase interleaved boost converter which has the same structure as the commercially available 3-phase inverter and current sharing capability. 400kW interleaved converter is designed and a performance of converter is evaluated through several experiments with a RTGC system. Energy saving VSG system can cut down fuel consumption by 36% and 21.3% at idle and unidirectional load operations.