• 전력전자학회:학술대회논문집
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• 전력전자학회 2000년도 전력전자학술대회 논문집
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• pp.305-308
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• 2000

A technique to suppress the low frequency ripple voltage of the DC output in three phase buck diode rectifiers is presented in this paper. The proposed pulse frequency modulation methods and duty ratio modulation methods are employed to regulate the output voltage of the buck diode rectifiers and guarantee zero-current -switching(ZCS) of the switch over the wide load range The proposed control methods used in this paper provide generally good performance such as low THD of the input line current and unity power factor. IN addition control methods can be effectively used to suppress the low frequency ripple voltage appeared in the dc output voltage. The harmonic injection technique illustrates its validity and effectiveness through the simulations.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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• pp.542-546
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• 2004

This paper presents a technique to reduce the low frequency ripple voltage of the dc output in a BIFRED converter with a small-sized energy storage capacitor. The proposed pulse width control method can be effectively used to suppress the low frequency ripple appeared in the dc output and still shows generally good performance such as low THD of input line current and high power factor. Using the small-sized energy storage capacitor, it has better merits of low cost and small size than a conventional BIFRED converter. The proposed technique is illustrated its validity and effectiveness through simulations.

• 산업기술연구
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• 제32권A호
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• pp.115-118
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• 2012

Recently, there are a lot of papers in order to replace the electrolytic capacitor into the film capacitor in output of PFC(Power Factor Correction). However, the film capacitor, which has capacitance of low values, causes a large ripple voltage in output of PFC. The LED drivers are connected series in the output of PFC and affected by the magnitude of voltage ripple. In this paper, we have compared the fixed frequency method with the variable frequency for the constant-current control and propose the control method to avoid the sub-harmonic oscillation in the variable input voltage. An 80W PFC, using film capacitors instead of electrolytic capacitors, and LED driver has been built and compared the fixed frequency control method with the variable frequency control method.

• Journal of Power Electronics
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• 제5권3호
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• pp.190-197
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• 2005

This paper presents a technique to reduce the low frequency ripple voltage of the dc output in a BIFRED converter with a small-sized energy storage capacitor. The proposed pulse width control method can be effectively used to suppress the low frequency ripple appeared in the dc output and still maintains generally good performance such as low THD of input line current and a high power factor. Using the small-sized energy storage capacitor, it has better merits of low cost and smaller size than a conventional BIFRED converter. The proposed technique is illustrated its validity and effectiveness through simulations.

• 한국정보통신학회논문지
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• 제12권11호
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• pp.2015-2021
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• 2008

최근 태양광 발전시스템 등 낮은 전압을 발생하는 전원소스를 이용하여 높은 승압효과를 얻기 위한 멀티레벨 인버터에 대한 관심이 높아지고 있다. 본 연구에서는 DC/DC의 출력전압 리플 저감을 위한 새로운 구조의 다중레벨 DC/DC 컨버터를 제안한다. 제안된 컨버터는 Buck컨버터를 직렬로 연결하여 다중전압을 발생하는 구조를 취함으로 기존의 Buck 컨버터에 비하여 출력 전압의 리플을 저감할 수 있었다. 또한 FPGA 기반 멀티레벨 인버터용 스위칭 함수를 구현하고자 하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 F
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• pp.2204-2206
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• 1997

A novel zero voltage and zero current switching (ZVZCS) full bridge (FB) PWM converter with a low output current ripple is proposed. The proposed circuit improve the demerits of the previously presented ZVBCS-FB-PWM converters[5-8] such as use of lossy components or additional active switches. A simple auxiliary circuit which includes neither lossy components nor active switches provides ZVZCS conditions to primary switches, ZVS for leading-leg switches and ZCS for lagging-leg switches. In addition, this proposed circuit reduces a output current ripple considerably. Many advantages including simple circuit topology, high efficiency, low cost and low current ripple make the new converter attractive far high power (> 1kW) applications.

• Journal of Power Electronics
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• 제12권2호
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• pp.249-257
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• 2012

An interleaved PWM converter is proposed to implement the features of zero voltage switching (ZVS), load current sharing and ripple current reduction. The proposed converter includes two ZVS converters with a common clamp capacitor. With the shared capacitor, the charge balance of the two interleaved parts is automatically regulated under input voltage and load variations. The active-clamping circuit is used to realize the ZVS turn-on so that the switching losses on the power switches are reduced. The ZVS turn-on of all of the switching devices is achieved during the transition interval. The interleaved pulse-width modulation (PWM) operation will reduce the ripple current and the size of the input and output capacitors. The current double rectifier (CDR) is adopted in the secondary side to reduce output ripple current so that the sizes of the output chokes and capacitor are reduced. The circuit configuration, operation principles and design considerations are presented. Finally experimental results based on a 408W (24V/17A) prototype are provided to verify the effectiveness of the proposed converter.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제49권12호
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• pp.813-820
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• 2000

A technique to suppress the low frequency ripple voltage of the DC output in three phase buck diode converter is presented in this paper. The proposed pulse frequency modulation methods and duty ratio modulation methods are employed to regulate the output voltage of the buck diode converter and guarantee zero-current-switching(ZCS) of the switch over the wide load range. The proposed control methods used in this paper provide generally good performance such as low THD of the input line current and unity power factor. In addition, control methods can be effectively used to suppress the low frequency ripple voltage appeared in the dc output voltage. The harmonic injection technique illustrates its validity and effectiveness through the simulations and experiments.

• Journal of Power Electronics
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• 제15권2호
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• pp.327-337
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• 2015

This study discusses the design of a parallel-operated DC-DC single-ended primary-inductor converter (SEPIC) for low-voltage application and current sharing with a constant output voltage. A coupled inductor is used for parallel-connected SEPIC topology. Generally, two separate inductors require different ripple currents, but a coupled inductor has the advantage of using the same ripple current. Furthermore, tightly coupled inductors require only half of the ripple current that separate inductors use. In this proposed work, tightly coupled inductors are used. These produce an output that is more efficient than that from separate inductors. Two SEPICs are also connected in parallel using the coupled inductors with a single common controller. An analog control circuit is designed to generate pulse width modulation (PWM) signals and to fulfill the closed-loop control function. A stable output current-sharing strategy is proposed in this system. An experimental setup is developed for a 18.5 V, 60 W parallel SEPIC (PSEPIC) converter, and the results are verified. Results indicate that the PSEPIC provides good response for the variation of input voltage and sudden change in load.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2012년도 전력전자학술대회 논문집
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• pp.592-593
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• 2012

Buck converter must operate at fairly high switching frequency for miniaturizing a whole circuit and achieving a fast response. However, at the conditions of low output voltage, high output current, and high switching frequency, the influence of parasitic elements to circuit operation will become extremely obvious. In this paper, it has been shown that these parasitic elements of output capacitor link the ripple of the output voltage. The MCP capacitors and aluminum electrolytic capacitors are applied to the buck converter and observed characteristics and the experimental results were reported.