• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.40 no.9
• /
• pp.1693-1698
• /
• 2015

This paper proposed a PFM(pulse-frequency modulator) boost converter which has dual pulse-width. The PFM boost converter is composed of BGR(band gap voltage reference generating circuit), voltage reference generating circuit, soft-start circuit, error amplifier, high-speed comparator, inductor current sensing circuit and pulse-width generator. Converter has different inductor peak current so it has wider load current range and smaller output voltage ripple. Proposed PFM boost converter generates 18V output voltage with input voltage of 3.7V and it has load current range of 0.1~300mA. Simulation results show 0.43% output voltage ripple at ligh load mode and 0.79% output voltage ripple at heavy load mode. Converter has efficiency 85% at light lode mode and it has maximum 86.4% at 20mA load current.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.48 no.12
• /
• pp.23-30
• /
• 2011

This paper presents a Single-Inductor Multiple-Output (SIMO) DC-DC Converter with a negative feedback selection circuit to improve a regulation property at light load and to generate independent multiple outputs. The conventional SIMO DC-DC converter with a fixed negative feedback circuit cannot regulate correctly at light load. The SIMO DC-DC converter with the proposed negative feedback selection circuit has been designed in 0.35um 2-poly 3-metal BCDMOS. This converter is dual output boost converter with the 1.5V input and 2.5V, 3.0V output. The power conversion efficiency varies from 59% at 10mA loads to 85% at 50mA loads.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.21 no.2
• /
• pp.54-63
• /
• 2007

Recently, a fuel cell with low voltage and high current output characteristics is remarkable for new generation system. It needs both a DC-DC step-up converter and DC-AC inverter to be used in fuel cell generation system. Therefor, this paper, consists of an isolated DC-DC converter to boost the fuel cell voltage $380[V_{DC}]$ and a PWM inverter with LC filter to convent the DC voltage to single-phase $220[V_{AC}]$. Expressly, a tapped inductor filter with freewheeling diode is newly implemented in the output filter of the proposed high frequency isolated ZVZCS PWM DC-DC converter to suppress circulating current under the wide output voltage regulation range, thus to eliminate the switching and transformer turn-on/off over-short voltage or transient phenomena. Besides the efficiency of 93-97[%]is obtained over the wide output voltage regulation ranges and load variations.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.15 no.2
• /
• pp.301-306
• /
• 2015

An ultra-compact and wideband low noise amplifier (LNA) in a quad flat non-leaded (QFN) package is presented. The LNA monolithic microwave integrated circuit (MMIC) is implemented in a $0.25{\mu}m$ GaN IC technology on a Silicon Carbide (SiC) substrate provided by Triquint. A source degeneration inductor and a gate inductor are used to obtain the noise and input matching simultaneously. The resistive feedback and inductor peaking techniques are employed to achieve a wideband characteristic. The LNA chip is mounted in the $3{\times}3-mm^2$ QFN package and measured. The supply voltages for the first and second stages are 14 V and 7 V, respectively, and the total current is 70 mA. The highest gain is 13.5 dB around the mid-band, and -3 dB frequencies are observed at 0.7 and 12 GHz. Input and output return losses ($S_{11}$ and $S_{22}$) of less than -10 dB measure from 1 to 12 GHz; there is an absolute bandwidth of 11 GHz and a fractional bandwidth of 169%. Across the bandwidth, the noise figures (NFs) are between 3 and 5 dB, while the output-referred third-order intercept points (OIP3s) are between 26 and 28 dBm. The overall chip size with all bonding pads is $1.1{\times}0.9mm^2$. To the best of our knowledge, this LNA shows the best figure-of-merit (FoM) compared with other published GaN LNAs with the same gate length.

• Journal of Power Electronics
• /
• v.18 no.5
• /
• pp.1479-1488
• /
• 2018

Power packet (PP) distribution system distributes power to different loads that share the same distribution cable in a packetized form. When compared with conventional power systems, a PP distribution system (PPDS) can reduce standby power, eliminate Point-of-Load (PoL) power conversion, and intelligently control the load demand from the source side. Due to the absence of PoL conversion, when multiple power sources at different voltage levels and conditioning requirements jointly send power to various loads at different voltage ratings, the generated voltage has an irregular shape. A large filter at each of the load sides is required to reduce such a large voltage ripple. In this paper, a single-inductor, multiple-input-single-output converter structure based multiple-energy-source mixer is proposed. It combines PP generation, maximum power point tracking (MPPT) of renewable energy sources (RESs) and filtering at the source side. To demonstrate the possible renewable energy integration, a PV panel is used as a power source together with other constant voltage sources. The PV power is approximately tracked using the constant voltage method and it is used for each of the PP generations. The proposed PP distribution system is experimentally verified and it is shown that a conventional PI controller is sufficient for stable system operation.

• 제어로봇시스템학회:학술대회논문집
• /
• 2005.06a
• /
• pp.356-361
• /
• 2005

In this paper, a new scheme of current programmed control for three phase PWM AC-AC converter is presented. Compared to duty-ratio voltage control, current programmed control has several advantages such as reduction of system order and inherent current protection. By considering only the magnitude components, the same scheme in the DC-DC converter can be extended to the three phase PWM AC-AC converter. Sensing the output voltage and the inductor current, an error signal will be generated by comparing the output voltage magnitude with a reference value. Then the error signal will be processed by a PI compensator to generate the current command. The converter switches will the change the state by a periodic clock pulse or at the instants when the inductor current magnitude reaches the current command. As an example case, the buck converter is treated. The converter analysis is carried out by applying the complex DQ circuit transformation to obtain basic physical insight into the converter operation and to establish some important characteristic equations for control purpose. The simulation with Simplorer shows the validity of the proposed scheme and the experimental results support the verification of the design.

• Journal of Power Electronics
• /
• v.16 no.3
• /
• pp.832-839
• /
• 2016

In this study, the performance of a direct current (DC)-DC buck converter is analyzed in the presence of non-idealities in passive components and semiconductor devices. The effect of these non-idealities on the various design issues of a DC-DC buck converter is studied. An improved expression for duty cycle is developed to compensate the losses that occur because of the non-idealities. The design equations for inductor and capacitor calculation are modified based on this improved expression. The effect of the variation in capacitor equivalent series resistance (ESR) on output voltage ripple (OVR) is analyzed in detail. It is observed that the value of required capacitance increases with ESR. However, beyond a maximum value of ESR (r_c,max), the capacitor is unable to maintain OVR within a specified limit. The expression of r_c,max is derived in terms of specified OVR and inductor current ripple. Finally, these theoretical studies are validated through MATLAB simulation and experimental results.

• Journal of Electrical Engineering and Technology
• /
• v.9 no.4
• /
• pp.1296-1308
• /
• 2014

This paper presents a new zero voltage switching (ZVS) converter for medium power and high input voltage applications. Three three-level pulse-width modulation (PWM) circuits with the same power switches are adopted to clamp the voltage stress of MOSFETs at $V_{in}/2$ and to achieve load current sharing. Thus, the current stresses and power ratings of transformers and power semiconductors at the secondary side are reduced. The resonant inductance and resonant capacitance are resonant at the transition interval such that active switches are turned on at ZVS within a wide range of input voltage and load condition. The series-connected transformers are adopted in each three-level circuit. Each transformer can work as an inductor to smooth the output current or a transformer to achieve the electric isolation and power transfer. Thus, no output inductor is needed at the secondary side. Three center-tapped rectifiers connected in parallel are used at the secondary side to achieve load current sharing. Compared with the conventional parallel three-level converters, the proposed converter has less switch counts. Finally, experiments based on a 1.44kW prototype are provided to verify the operation principle of proposed converter.

• Transactions on Electrical and Electronic Materials
• /
• v.11 no.1
• /
• pp.24-28
• /
• 2010

A simulation study of a current-mode direct current (DC)-DC buck converter is presented in this paper. The converter, with a fully integrated power module, is implemented by using sense method metal-oxide-semiconductor field-effect transistor (MOSFET) and bipolar complementary metal-oxide-semiconductor (BiCMOS) technology. When the MOSFET is used in a current sensor, the sensed inductor current with an internal ramp signal can be used for feedback control. In addition, the BiCMOS technology is applied in the converter for an accurate current sensing and a low power consumption. The DC-DC converter is designed using the standard $0.35\;{\mu}m$ CMOS process. An off-chip LC filter is designed with an inductance of 1 mH and a capacitance of 12.5 nF. The simulation results show that the error between the sensing signal and the inductor current can be controlled to be within 3%. The characteristics of the error amplification and output ripple are much improved, as compared to converters using conventional CMOS circuits.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.26 no.3
• /
• pp.237-240
• /
• 2021

This research proposes a new rectifier circuit to reduce the circulating current of a phase-shifted full bridge converter. The proposed circuit is a structure in which the output inductor of the secondary rectifier circuit is changed to a coupled inductor in the phase-shifted full bridge with the existing center-tapped rectifier. The parts are rearranged after adding a diode. After applying the proposed circuit, the circulating current to the primary current of the transformer and the voltage stress of the rectifier diode on the secondary side of the transformer are reduced. Accordingly, the snubber loss of the rectifier is improved. By reducing the circulating current and snubber loss, the circuit achieves higher efficiency than conventional circuits. In this research, we present the structure of the proposed circuit, its strengths, and the analysis results from experiments. Furthermore, its effectiveness is verified through the experimental results of a prototype converter with an input of 300-400 V and an output of 50 V/1 kW.