• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.60 no.12
• /
• pp.2286-2292
• /
• 2011

In this paper we present the design of Low Noise Amplifier(LNA), mixer and filter for RF front-end part of partial discharge monitoring system. The monitoring system of partial discharge in high voltage power machinery is used to prevent many kinds of industrial accidents, and is usually composed of three parts - sensor, RF front-end and digital microcontroller unit. In our study, LNA, mixer and filter are key components of the RF front-end. The LNA consists of common gate and common source-cascaded structure and uses the resistive feedback for broad band matching. A coupled line structure is utilized to implement the filter, of which size is reduced by the meander structure. The mixer is designed using dual gate structure for high isolation between RF and local oscillator signal.

• Proceedings of the IEEK Conference
• /
• 2004.06a
• /
• pp.3-6
• /
• 2004

This paper. we investigate the OFDM-based wireless LAN systems operating in the 60 GHz frequency band as part of the fourth-generation (4G) systems. The 60 GHz band is of much interest since this is the band in which a massive amount of spectral space (5 GHz) has been allocated worldwide for dense wireless local communications. This paper gives an overview of 60 GHz indoor wireless channel characteristics and an effect on phase noise. The performance of OFDM system is severely degraded by the local oscillator phase noise, which causes both common phase error and inter-carrier interference. We provide the exact analysis of the phase noise effect on the OFDM system.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.27 no.2B
• /
• pp.151-159
• /
• 2002

Frequency synthesizer is an essential part for developing high speed frequency hopping radio. A high speed synthesizer using DDS driven PLL technique is designed and implemented for a X-band portable satellite terminal. It generates transmitter and receiver frequency ranging 6600∼7100MHz and 6140∼6640MHz, respectively by using 102.4MHz local oscillator, Its lock time is below 15 $\mu$sec and Its phase noise is below -754dBc at 1KHz offset Sequency.

• 전기의세계
• /
• v.31 no.5
• /
• pp.383-390
• /
• 1982

The high power glass laser system was designed and constracted which consisted of a TEM$\_$00/ mode Q-switching oscillator, a pulse shaping, system, two-stage pre-amplifiers, five-stage main amplifiers, a Faraday rotator, and a uni-guide slit. The laser output of 3OGW with the pulsewidth of 2 nsec was obtained by performing the amplifiing experiment in this system. When the laser light with the pulsewidth of 10 nsec was amplified, the large factor of amplification was obtained in the beginning of pulse, but the factor of amplification decreased gradually in the later part of pulse. Therefore, the laser light which has short pulsewidth of-2nsec must be amplified in order to obtain the larger factor of amplification. When the laser beam from the high power glass laser system was irradiated to plasma, the reflected laser light from plasma which occured inevitably could be attenuated to the order of 10$\^$-4/ by using the Faraday rotator and the uni-guide slit.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.23 no.5
• /
• pp.692-698
• /
• 1986

To fabricate digital I\ulcorner devices which are compatible with analog devices in a chip, phosphorus is implanted in the buried layer of I\ulcorner part which has already been diffused with arsenic impurity. Experimental results show that the muminim propagation delay time of I\ulcorner ring oscillator is 16-18 ns when the upward current gain of I\ulcorner transistor is 6-10.

• Proceedings of the Korea Society of Information Technology Applications Conference
• /
• 2005.11a
• /
• pp.339-342
• /
• 2005

In order to support ultrawide-band signal generation for low rate WPAN, several types of signal generation mechanisms are suggested such as Chaos, Impluse, and Chirp signals by the activity of IEEE 802.15.4a. The communication system applied chaos theory may have ultrawide-band characteristics with spread spectrum and immunity from multipath effect. In order to use the advantage of chaotic signal generation, we introduce the system implementation of communication and networking systems with the chaos UWB signal. This system may be composed of mainly three parts in hardware architecture : RF transmission with chaotic signal generation, signal receiver using amplifiers and filters, and 8051 & FPGA unit. The most difficult part is to implement the chaotic signal generator and build transceiver with it. The implementation of the system is devidced into two parts i.e. RF blocks and digital blocks with amplifiers, filters, ADC, 8051 processor, and FPGA. In this paper, we introduce the system block diagram for chaotic communications. Mainly the RF block is important for the system to have good performance based on the chaotic signal generator. And the main control board functions for controlling RF blocks, processing Tx and Rx data, and networking in MAC layer.

• Journal of Institute of Control, Robotics and Systems
• /
• v.14 no.9
• /
• pp.939-947
• /
• 2008

The GPS tracking loop consists of three parts in general: discriminator, loop filter and DCO (Digitally Controlled Oscillator). The loop filter is the main part of the tracking loop designed to ensure a good tracking performance. Generally, the loop filter is designed using classical PI(Proportional Integral) control. Although the carrier Doppler and code Doppler are generated by the same relative movement between the satellite and the user, often, the loop filters for each tracking loop are designed separately and independently. Sometimes, they are used in a combined manner such as carrier aided code tracking, FLL assisted PLL, etc. For better GPS signal tracking, we need to design the FLL/PLL/DLL altogether optimally. The purpose of this paper is to design a GPS receiver tracking loop based on the Kalman filter in a combined manner. Also, the proposed GPS receiver tracking loop is compared with a conventional tracking loop in terms of the transfer function and the DCO input. This paper shows that conventional tracking loop is equal to the Kalman filter based tracking loop.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.14 no.9
• /
• pp.2164-2170
• /
• 2010

Digital Radio Frequency Memory, ( as DRFM ), is a device with the ability to restore output to the input RF signal in the required time after storing the incoming RF signals. Therefore DRFM is widely used in Jammer, EW Simulator, Target Echo Generator, and so on. This paper proposes its hardware implementation composed with the high frequency part and the digital processing part consisting of RF input/output module and local oscillator module. It is also proposed the replicated signal generation method which is consisted of the Analog-Digital conversion in the form of pulsed RF signal quantization, and FPGA to save and produce the playback signal, and RF signals to produce a Digital-Analog Conversion in the digital processing unit. This proposed scheme applied to test board and confirmed the validity of the proposed scheme through the test results obtained by the simulated input signals.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.14 no.5
• /
• pp.1103-1108
• /
• 2010

In this paper, Frequency Synthesizer which is widely used for FH-SS system is proposed and the experimental results are analyzed. The performance of the DPLL(Digital Phase-Locked-Loop), which is the main part of the Synthesizer is analyzed by the computer program. Using Maxplus-II tool provided by altera. co., ltd, each part of the DPLL is designed and all of them is integrated into EPM7064SLC44-10 chip. And the simulation results are compared with the characteristics of the implemented circuits for analysis. And the experiential results show that the N value of the loop filter is toggled to adjacent N value, which result in phase jitter of the output. It can be resolved by increasing DCO(Digital Controlled oscillator) clock rate.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.18 no.5
• /
• pp.1028-1033
• /
• 2014

We investigate the OFDM-based wireless LAN systems operating in the 60 GHz frequency band as part of the fourth-generation (4G) systems. The 60 GHz band is of much interest since this is the band in which a massive amount of spectral space has been allocated worldwide for dense wireless local communications. This paper gives an overview of 60 GHz band channel characteristics and an effect on phase noise. The performance of OFDM system is severely degraded by the local oscillator phase noise, which causes both common phase error and inter-carrier interference. In this paper, we apply phase noise suppression (PNS) algorithm that is easy for implementation to OFDM based 60 GHz wireless LAN system and analyze the SER performance. In case of using the PNS algorithm, SER performance is improved about 6 dB, 7.5 dB, respectively in 16, 64-QAM.