• Journal of Korea Society of Industrial Information Systems
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• v.12 no.4
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• pp.148-152
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• 2007

This paper develops an integrated optic transmitter/receiver based on ring-type WDM PON. The optic transmitter/receiver can transmit real-time images from the CCTV of a remote street without compression and transmit TCP/IP data using an optic fiber. This system can also perform remote controls of the CCTV camera. The developed optic transmitter/receiver can provide the monitoring service of an advanced image quality of remote traffic using a broadband technology.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.3
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• pp.221-228
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• 2011

This paper describes 250-Mb/s fiber optic transmitter and receiver ICs for plastic optical fiber applications using a$ 0.18-{\mu}m$ CMOS technology. Simple signal and light detection schemes are introduced for power reduction in sleep mode. The transmitter converts non-return-to-zero digital data into 650-nm visible-red light signal and the receiver recovers the digital data from the incident light signal through up to 50-m plastic optical fiber. The transmitter and receiver ICs occupy only 0.62 $mm^2$ of area including electrostatic discharge protection diodes and bonding pads. The transmitter IC consumes 23 mA with 20 mA of LED driving currents, and the receiver IC consumes 16 mA with 4 mA of output driving currents at 250 Mb/s of data rate from a 3.3-V supply in active mode. In sleep mode, the transmitter and receiver ICs consume only 25 ${\mu}A$ and 40 ${\mu}A$, respectively.

• Journal of IKEEE
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• v.14 no.4
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• pp.283-290
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• 2010

This study is on the design of 10Gbps CMOS receiver circuits for fiber-optic communication. The receiver is made up of a photodiode, a transimpedance amplifier, a limiting amplifier, an equalizer, a clock and data recovery loop circuit, and a demultiplexer or demux with some auxiliary circuits including I/O circuits. Various wideband or high-speed circuit techniques are harnessed to realize a feasible, effective, and reliable receiver for a SONET fiber-optic standard, OC-192.

• ETRI Journal
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• v.28 no.1
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• pp.103-106
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• 2006

We have fabricated a planar lightwave circuit (PLC) hybrid-integrated optical sub-assembly of a triplexer using a thin film filter (TFF)-attached wavelength division multiplexer (WDM) and photodiode (PD) carriers. Two types of TFFs were attached to a diced side of a silica-terraced PLC platform, and the PD carriers with a $45^{\circ}$ mirror on which pin-PDs were bonded were assembled with the platform. A clear transmitter eye-pattern and minimum receiver sensitivity of -24.5 dBm were obtained under 1.25 Gb/s operation for digital applications, and a second-order inter-modulation distortion (IMD2) of -70 dBc was achieved for an analog receiver.

• ETRI Journal
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• v.9 no.2
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• pp.24-35
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• 1987

A Design and Fabrication of 565 Mbit/s Optical Fiber Transmission Link We calculated the transfer functions of optical channel components and formulated the optimum transfer function of optical receiver for optical transmission to show a design rule of fiber optical link for digital transmission. And we evaluated various causes of sensitivity degradation to determine the receiver specification. Also we fabricated and demonstrated a 565Mbit/s single mode fiber optic link, 27km, to show the practicality of designed fiber optic link. The output power of the transmitter was above -3dBm, and the sensitivity of the optical receiver was -37.8dBm which is the same value we expected. Also the dynamic range was more than 25dB.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.4
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• pp.598-603
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• 1990

This study evaluates the performance of an optical receiver for binary phase shift keying (BPSK) signals in the presence of short noise originating from the photo diode and phase noise of the optical source. The case of using I.O. hybrid compare with the fiber optic hybrid to mix received optical signal and laser local oscillator signal. The impact of these noise is minimized if loop natural frequency and power split ratio between data and carrier recovery branch are choosen optimally. Then it is obtained that required laser linewidt to achieve a BER of 10**-9. The results are the same except theat in case of using the fiber optic hybrid the required optical power is twice as much as the I.O. hybrid.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2003.06a
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• pp.1663-1667
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• 2003

This thesis is on tile development of LD(Laser Diode) chip tester and the control system based on graphical programming language(LabVIEW) to control the equipment. The LD chip tester is used to test the optic power and the optic spectrum of the LD Chip. The emitter size of LD chip and the diameter of the receiver(optic fiber) are very small. Therefore, in order to test each chip precisely, this tester needs high accuracy. However each motion part of the tester could not accomplish hish accuracy due to the limit of the mechanical performance. Hence. an image processing with machine vision was carried out in order to compensate for the error. and also a load test was carried out so as to reduce tile impact of load on chip while the probing motion device is working. The obtained results were within ${\pm}$5$\mu\textrm{m}$ error.

• The Journal of Engineering Research
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• v.2 no.1
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• pp.103-111
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• 1997

EDFA (Erbium Doped Fiber Amplifier) is widely used to compensate the loss in fiber optic transmission system. The characteristics of EDFA are investigated by analyzing the mechanism amplifying the optical power of an input with several factors to obtain the criteria for designing EDFA. When it is used in fiber optic transmission system, signal to noise characteristics in the receiver is deteriorated due to the spontaneous emission noise of EDFA. We investigate the operating conditions of EDFA to reduce BER (Bit Error Rate).

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.12C
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• pp.249-254
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• 2001

A receiver ASIC for fiber optic modules of STM-1 optical communication has been fabricated with 0.65 $\mu\textrm{m}$ CMOS technology. The ASIC has a limit amplifier circuit for the 155.52 Mbps data reshaping, and a clock extraction circuit for the 155.52 MHz clock recovery. The ASIC has an acquisition aid and LOS monitoring circuit for properly operation with near 155.52 MHz clock frequency in case of the data loss due to transmission line open or data transfer fail. Measured results show that the circuit reshapes data from 5 mV to 1 V wide range of input voltage condition, add it recovers system clock with stable on any condition.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.3
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• pp.218-223
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• 2016

This study examined the order of the Butterworth filter for the correlation on the sensitivity of the receiver in the receiver of an optical system. In the general case, the sensitivity of the receiver is increased if the order of the filter was increased more. This is because increasing the order of the filter response of the normalized frequency of the filter is similar to the rectangular wave. For that reason, the method used to increase the order of the filter increases the sensitivity of the receiver. On the other hand, a method of increasing the order of the filter and makes the system complicated increases the cost of the system. This study examined the correlation between the order of the sensitivity of the receiver filter and to configure the system by simply looking for ways to reduce the cost of the system. The simulation results showed that increasing the order of the filter resulted in a receiver that can determine if the sensitivity is raised. In addition, the order of the Butterworth filter range that does not reduce the sensitivity of the receiver was 2. Therefore, it will be possible to implement an inexpensive optical system of the receiver using the data from this study.