Journal of IKEEE (전기전자학회논문지)

Institute of Korean Electrical and Electronics Engineers (한국전기전자학회)
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Design of 10Gbps CMOS Receiver Circuits for Fiber-Optic Communication

광통신용 10Gbps CMOS 수신기 회로 설계

  • Park, Sung-Kyung (School of Electrical Engineering, Pusan National University) ;
  • Lee, Young-Jae (System-on-Chip Research Department, Electronics and Telecommunications Research Institute) ;
  • Byun, Sang-Jin (Division of Electronics and Electrical Engineering, Dongguk University)
  • 박성경 (부산대학교 전자전기공학부) ;
  • 이영재 (한국전자통신연구원 시스템반도체 연구부) ;
  • 변상진 (동국대학교 전기전자공학부)
  • Received : 2010.12.03
  • Accepted : 2010.12.28
  • Published : 2010.12.30
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Abstract

This study is on the design of 10Gbps CMOS receiver circuits for fiber-optic communication. The receiver is made up of a photodiode, a transimpedance amplifier, a limiting amplifier, an equalizer, a clock and data recovery loop circuit, and a demultiplexer or demux with some auxiliary circuits including I/O circuits. Various wideband or high-speed circuit techniques are harnessed to realize a feasible, effective, and reliable receiver for a SONET fiber-optic standard, OC-192.

본 연구는 광통신을 위한 10Gbps CMOS 수신기 회로 설계에 관한 것이다. 수신기는 포토다이오드, 트랜스임피던스 증폭기, 리미팅 증폭기, 등화기, 클락 및 데이터 복원 회로, 디멀티플렉서, 기타 입출력 회로 등으로 구성돼있다. 여러 광대역 혹은 고속 회로 기법을 써서 SONET OC-192 표준용 광통신에 적합한, 효과적이고 신뢰성 있는 수신기를 구현하고자 하였다.

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References

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