• Title/Summary/Keyword: Operation Scheme

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Multi-version Locking Scheme for Flash Memory Devices (플래시 메모리 기기를 위한 다중 버전 잠금 기법)

  • Byun, Si-Woo
    • Proceedings of the KIEE Conference
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    • 2005.05a
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    • pp.191-193
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    • 2005
  • Flash memories are one of best media to support portable computer's storages. However, we need to improve traditional data management scheme due to the relatively slow characteristics of flash operation as compared to RAM memory. In order to achieve this goal, we devise a new scheme called Flash Two Phase Locking (F2PL) scheme for efficient data processing. F2PL improves transaction performance by allowing multi version reads and efficiently handling slow flash write/erase operation in lock management process.

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Adaptive Control for the Conventional Mode of Operation of MEMS Gyroscopes

  • Park, Sungsu;Roberto Horowitz
    • 제어로봇시스템학회:학술대회논문집
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    • 2002.10a
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    • pp.39.2-39
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    • 2002
  • This paper presents adaptive add-on control algorithms for theconventional mode of operation of MEMS z-axis gyroscopes. This scheme is realized by adding an outer loop to a conventional force-balancing scheme that includes a parameter estimation algorithm. The parameter adaptation algorithm estimates the angular rate, identifies and compensates the quadrature error, and may permit on-line automatic mode tuning. The convergence and resolution analysis show that the proposed adaptive add-on control scheme prevents the angular rate estimate from being contaminated by the quadrature error, while keeping ideal resolution performance of a conventional force-balancing scheme.

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Decentralized Vehicle-to-Grid Design for Frequency Regulation within Price-based Operation

  • Kim, Seung Wan;Jin, Young Gyu;Song, Yong Hyun;Yoon, Yong Tae
    • Journal of Electrical Engineering and Technology
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    • v.10 no.3
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    • pp.1335-1341
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    • 2015
  • The utilization of electric vehicles has been suggested to support the frequency regulation of power system. Assuming that an intermediate aggregator exists, this study suggests a decentralized vehicle-to-grid operation scheme in which each vehicle-to-grid aggregator can behave independently of the power system operator. To implement this type of decentralized operation, this study adopts a price-based operation that has been proposed by many researches as an alternative operation scheme for the power system. In this environment, each vehicle-to-grid aggregator can determine its participation in vehicle-to-grid service in consideration of its residual energy of aggregated system and real-time market price. Consequently, the main purpose of this study is to verify whether or not the vehicle-to-grid power can effectively support the current frequency regulation function within the price-based operation scheme. Specifically, a frequency regulation method is proposed based on the real-time price signal, and a feedback controller for battery management is designed for decentralized vehicle-to-grid operation.

A study on the optimum operation scheme with operating reserve power (운전예비력의 최적운용방식에 관한 연구)

  • 송길영
    • 전기의세계
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    • v.28 no.5
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    • pp.49-55
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    • 1979
  • During severe emergencies which result in insufficient generation to meet load, an automatic load shedding method considering the spinning and operating reserve can establish the optimum system operation. This paper presents methods and results of a study on the optimum operating scheme with spinning and operating reserve power in case of outage of large generator units to prevent frequency decay and continue stable operation. This study covers following three parts 1) Analysis of spinning reserve characteristics 2) Determination of operating reserve requirements 3) Development of the optimum load shedding programs By this study the optimum system operating method was recommended for reliable operation of power system.

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A Study on the Operation Frequencies of the Multiple Tie Tamper (Multiple Tie Tamper의 투입주기평가에 관한 연구)

  • 오지택
    • Proceedings of the KSR Conference
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    • 2000.11a
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    • pp.434-441
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    • 2000
  • This paper estabilsh the systematical scheme that evaluates the operation frequencies of the MTT(Multiple Tie Tamper). An evaluation of the operation frequencies, covering 4 different permanent ways that are Kyungbu, Homan, Jungang and Youngdong, has been carried out using real track irregularities. The deterioration rate of track irregularities used to evaluate rational operation frequencies of MTT in a block of railway track. Furthermore, this paper provides the scheme that prevents damage due to excess using of MTT and to promote efficiency of MTT application.

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Study on the Structure Optimization and the Operation Scheme Design of a Double-Tube Once-Through Steam Generator

  • Wei, Xinyu;Wu, Shifa;Wang, Pengfei;Zhao, Fuyu
    • Nuclear Engineering and Technology
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    • v.48 no.4
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    • pp.1022-1035
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    • 2016
  • A double-tube once-through steam generator (DOTSG) consisting of an outer straight tube and an inner helical tube is studied in this work. First, the structure of the DOTSG is optimized by considering two different objective functions. The tube length and the total pressure drop are considered as the first and second objective functions, respectively. Because the DOTSG is divided into the subcooled, boiling, and superheated sections according to the different secondary fluid states, the pitches in the three sections are defined as the optimization variables. A multi-objective optimization model is established and solved by particle swarm optimization. The optimization pitch is small in the subcooled region and superheated region, and large in the boiling region. Considering the availability of the optimum structure at power levels below 100% full power, we propose a new operating scheme that can fix the boundaries between the three heat-transfer sections. The operation scheme is proposed on the basis of data for full power, and the operation parameters are calculated at low power level. The primary inlet and outlet temperatures, as well as flow rate and secondary outlet temperature are changed according to the operation procedure.

Study of Hash Collision Resolution Scheme for NAND Flash Memory (NAND Flash 메모리 기반 해시 충돌 처리 기법에 관한 연구)

  • Park, Woong-Kyu;Kim, Sung-Chul;On, Byung-Won;Jung, Ho-Youl;Choi, Gyu Sang
    • IEMEK Journal of Embedded Systems and Applications
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    • v.12 no.6
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    • pp.413-424
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    • 2017
  • In this paper, we show shortcomings of separate chaining scheme by way of experiments with NAND flash memory and improve the performance with merge chaining scheme which is proposed in this paper. We explain this merge chaining scheme and explain how to improve the performance of search operation. Merge chaining scheme shows better performance at insert and search operation compare to separate chaining scheme.

Anti-Islanding Scheme for a Number of Grid-connected Inverters under Parallel Operation (병렬연결된 다수 대 계통연계형 인버터를 위한 단독운전 방지 기법)

  • Kim, Dong-Gyun;Park, Kwan-nam;Cho, Sang-Yoon;Lee, Young-Kwoun;Yu, Gwon-Jong;Song, Seung-Ho;Choy, Ick;Choi, Ju-Yeop
    • Proceedings of the KIPE Conference
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    • 2016.07a
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    • pp.351-352
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    • 2016
  • Since anti-islanding scheme of grid-connected inverter is a key function of standards compliance, unintentional islanding results in safety hazards, reliability, and many other issues. Therefore, many anti-islanding schemes have been researched, however, existing anti-islanding schemes show poor power quality and non-detection zone issues. Besides, most of them have problems which deteriorate performance of islanding detection under parallel-operation. Therefore, this paper proposes a new anti-islanding scheme that has both negligible power quality degradation, no non-detection zone and precise islanding detection under parallel-operation. Finally, both simulation and experimental results validate the proposed scheme.

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A Viterbi Decoder with Efficient Memory Management

  • Lee, Chan-Ho
    • ETRI Journal
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    • v.26 no.1
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    • pp.21-26
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    • 2004
  • This paper proposes a new architecture for a Viterbi decoder with an efficient memory management scheme. The trace-back operation is eliminated in the architecture and the memory storing intermediate decision information can be removed. The elimination of the trace-back operation also reduces the number of operation cycles needed to determine decision bits. The memory size of the proposed scheme is reduced to 1/($5{\times}$ constraint length) of that of the register exchange scheme, and the throughput is increased up to twice that of the trace-back scheme. A Viterbi decoder complying with the IS-95 reverse link specification is designed to verify the proposed architecture. The decoder has a code rate of 1/3, a constraint length of 9, and a trace-forward depth of 45.

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Neutral-Point Voltage Balancing Control Scheme for Fault-Tolerant Operation of 3-Level ANPC Inverter (3-레벨 ANPC 인버터의 고장 허용 운전 시 중성점 전압 균형 제어 기법)

  • Lee, Jae-Woon;Kim, Ji-Won;Park, Byoung-Gun;Nho, Eui-Cheol
    • The Transactions of the Korean Institute of Power Electronics
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    • v.24 no.2
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    • pp.120-126
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    • 2019
  • This study proposes a neutral voltage balance control scheme for stable fault-tolerant operation of an active neutral point clamped (ANPC) inverter using carrier-based pulse width modulation. The proposed scheme maintains the neutral voltage balance by reconfiguring the switching combination and modulating the reference output voltage in order to solve the degradation of the output characteristic in the fault tolerant operation due to the fault of the power semiconductor switch constituting the ANPC inverter. The feasibility of the proposed control scheme is confirmed by HIL experiment using RT-BOX.