• Journal of the Institute of Electronics Engineers of Korea SC
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• v.37 no.2
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• pp.29-36
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• 2000

The principle and design of two-stage CMOS operational amplifier with rail-to-rail input and class-AB output stage is presented. The rail-to-rail input stage shows almost constant transconductance independent of the common mode input voltage range in global transistor operation region. This new technique does not make use of accurate current-voltage relationship of MOS transistors. Hence it was achieved by using simple linear relationship of currents. The simulated transconductance variation using SPICE is less the 4.3%. The proposed global two-stage opamp can operate both in strong inversion and in weak inversion. Class AB output stage proposed also has a full output voltage swing and a well-defined quiescent current that does not depend on power supply voltage. Since feedback class- AB control is used, it is expected that this output stage can be operating in extremely low voltage. The variation of DC-gain and unity-gain frequency is each 4.2% and 12%, respectively.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.1 s.34
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• pp.65-71
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• 2005

At present, Electronic industries push ahead to eliminate the Pb(Lead) -a hazardous material-from all products. Especially, we have performed to select the optimum standard composition of lead free alloy for the application to products for about 3 years from 2000. These days, we have the chance for applying to the mass-production. This project constructed the system for applying the lead free solders on consumer electronic products, which is one of the major products of the LG Electronics. To select the lead free solders with corresponding to the product features, we have passed through the test and applied with Sn-3.0Ag-0.5Cu alloy system to our products, and for the application to the high melting temperature composition, we secured the thermal resistance of the many parts and substrate and optimized the processing conditions. We have operated the temperature cycling test and the high temperature storage test under the standards to confirm the reliability of the products. On these samples, we considered the consequence of our decision by the operating test. For the long life time of the product, we have operated the temperature cycling test at $-45^{\circ}C\;-\;+125^{\circ}C$, 1 cycle/hour, 1000 cycles. Also we have tested the tin whisker growth about lead free plating on lead finish. We have analyzed with the SEM, EDS and any other equipment for confirming the failure mode at the joint and the tin whisker growth on lead free finish.

• Korean Chemical Engineering Research
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• v.46 no.3
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• pp.521-528
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• 2008

The micro-porous asymmetric PVDF hollow fiber membranes for gas-liquid contactor were prepared by the dry-jet wet phase inversion process and the characteristics of hollow fiber membranes were evaluated by the gas permeation method and scanning electron microscope. The chemical absorbent for removal of $SO_2$ gas was sodium hydroxide at bench scale hollow fiber membrane contactor. The experiments were performed in a counter-current mode of operation with gas in the shell side and liquid in the fiber lumen of the module to examine the effect of various operating variables such as concentration of absorbent, gas flow rate, L/G ratio and concentration of inlet $SO_2$ gas on the $SO_2$ removal efficiency using PVDF hollow fiber membrane contactor. Membrane mass transfer coefficient($k_m$) was calculated by mathematical modeling. The volumetric overall mass transfer coefficient increased with increasing the concentration of absorbent and L/G ratio. The increase of the absorbent concentration and L/G ratio not only provides more sufficient alkalinity but also decreases liquid phase resistance. The volumetric overall mass transfer coefficient increased with increasing gas flow rate due to decreasing the gas phase resistance.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.18 no.8
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• pp.879-885
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• 2008

A rotordynamic analysis was performed with a decant-type centrifuge, which is a kind of industrial centrifuge. The system is composed of screw rotor, bowl rotor, driving motors, gear box, and support rolling element bearings. These rotors have a rated speed of 4300 rpm, and were modeled utilizing a rotordynamic FE method for analysis, which was verified through 3-D FE analysis. Design goals are to achieve wide separation margins of lateral critical speeds, and favorable unbalance responses of the rotor in the operating range. Then, a complex analysis rotordynamic analysis of the system was carried out to evaluate its forward synchronous critical speeds and mode shapes, whirl natural frequencies, and unbalance responses under various balance grade. As a result of analysis, the rotordynamic analysis performed by separating a screw rotor and bowl rotor may cause an error in predicting critical speed of entire system. Therefore, the rotordynamic analysis of a coupled rotor combining a screw and bowl rotor must be performed in order to more accurately estimate dynamic characteristics of the decanter-type centrifuge as presented in this paper. Also, rolling element bearings with suitable stiffness should be selected to keep enough separation margin. In addition, in establishing balance grade of a screw and bowl rotor, ISO G2.5 balance grade is more recommended than ISO G6.3, in particular balancing correction of a screw rotor based on ISO G2.5 grade is strongly recommended.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.8 no.4
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• pp.1-8
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• 2008

Recently, there is developing various ubiquitous application services using sensor networks based on TinyOS represented the operating system of sensor node. These sensor networks perform the collection and the transmission of sensing data from sensor node to get the context information. In this paper, we proposes the sensor node control algorithm which converts a sensor node to sleep, active, power off mode according to monitoring result of the voltage state of sensor node. Also, we designs and implement the sensor control module on server, sink, sensor node of sensor networks using this algorithm. It designs a sensor voltage control module of sensor node, data receive and display module of USN server using a java language and TinyOS. And, it checks the voltage state of sensor node, and it changes one of the sleep or power off modes in case of high voltage loss. Accordingly, we effectively use the power of sensor nodes as changing control modes of sensor nodes.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.2
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• pp.150-159
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• 2009

Generally, the operating efficiency of the washing machine is mostly affected by the washing time. The washing time is determined by the amount and the type of the laundry. Although the type of the laundry is easily inputted by the user, but the amount of the laundry is difficult to do. For this reason, the specific process is existed for the estimation of the laundry and the time of the washing mode is determined by the estimated laundry. Therefore, this paper proposes the washing load estimation algorithm by the inertia estimator. The proposed algorithm is implemented on the PMSM drive using the low cost position sensor for practical washing machine application. The proposed algorithm is verified by the drum washing machine for the practical load condition test.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.6
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• pp.496-503
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• 2009

In this paper, a new three-phase interleaved isolated high efficiency boost dc-dc converter with active clamp is proposed. The converter is capable of increased power transfer due to its three-phase power configuration, and it reduces the rms current per phase, thus reducing conduction losses. Further, interleaved operation of three-phase boost converter reduces overall ripple current, which is imposed into fuel cells and realizes smaller sized filter components, increasing effective operating frequency and leading to higher power density. Each output current of three-phase boost converter is combined by the three-phase transformer and flows in the continuous conduction mode by the proposed three-phase PWM strategy. An efficiency of above 96% is mainly achieved by reducing conduction losses and switching losses are reduced by the action of active clamp branches, as well. The proposed converter and three-phase PWM strategy are analyzed, simulated and implemented in hardware. Experimental results are obtained on a 500 W prototype unit, with all of the design verified and analyzed.

• Journal of Power Electronics
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• v.17 no.1
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• pp.222-231
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• 2017

In this paper, a new architecture for a cost-effective power conditioning systems (PCS) using a single-sourced asymmetric cascaded H-bridge multilevel inverter (MLI) for photovoltaic (PV) applications is proposed. The asymmetric MLI topology has a reduced number of parts compared to the symmetrical type for the same number of voltage level. However, the modulation index threshold related to the drop in the number of levels of the inverter output is higher than that of the symmetrical MLI. This problem results in a modulation index limitation which is relatively higher than that of the symmetrical MLI. Hence, an extra voltage pre-regulator becomes a necessary component in the PCS under a wide operating bias variation. In addition to pre-stage voltage regulation for the constant MLI dc-links, another auxiliary pre-regulator should provide isolation and voltage balance among the multiple H-bridge cells in the asymmetrical MLI as well as the symmetrical ones. The proposed PCS uses a single-ended DC-DC converter topology with a coupled inductor and charge-pump circuit to satisfy all of the aforementioned requirements. Since the proposed integrated-type voltage pre-regulator circuit uses only a single MOSFET switch and a single magnetic component, the size and cost of the PCS is an optimal trade-off. In addition, the voltage balance between the separate H-bridge cells is automatically maintained by the number of turns in the coupled inductor transformer regardless of the duty cycle, which eliminates the need for an extra voltage regulator for the auxiliary H-bridge in MLIs. The voltage balance is also maintained under the discontinuous conduction mode (DCM). Thus, the PCS is also operational during light load conditions. The proposed architecture can apply the module-integrated converter (MIC) concept to perform distributed MPPT. The proposed architecture is analyzed and verified for a 7-level asymmetric MLI, using simulation results and a hardware implementation.

• KSBB Journal
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• v.16 no.6
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• pp.533-537
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• 2001

${\alpha}$-lactalbumin and ${\beta}$-lactoglobulin in whey proteins were separated by high performance membrane chromatography (HPMC). The separation mechanism involved anion-exchange, and the stationary phase was anion CIM (Convective Interaction Media) DEAE, QA disk and cation exchanger SO$_3$(16${\times}$3 mm). Two types of mobile phase were used, buffer A (20 mM Tris-HCI, pH 7.3) and buffer B(buffer A + 1 M NaCl), As the amount of NaCl dissolved in buffer linearly increased, which enabled a gradient elution mode. The optimum mobile phase and operating condition (Buffer A/Buffer B = 100/0 - 30/70 vol%, gradient time 1 min, 30/70 - 10/90 vol.%, gradient time 2 min) were experimentally determined. In this experimental condition, ${\alpha}$-lacta1bumin, ${\beta}$-lactoglobulin were separated within 5 min at a mobile phase flow rate of 4 mL/min.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.5
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• pp.100-105
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• 2010

A multi-band low noise amplifier (LNA) is designed in 90 nm RF CMOS process for 3GPP LTE (3rd Generation Partner Project Long Term Evolution) applications. The designed multi-band LNA covers the eight frequency bands between 1.85 and 2.8 GHz. A tunable input matching circuit is realized by adopting a switched capacitor array at the LNA input stage for providing optimum performances across the wide operating band. Current steering technique is adopted for the gain control in three steps. The performances of the LNA are verified through post-layout simulations (PLS). The LNA consumes 17 mA at 1.2 V supply voltage. It shows a power gain of 26 at the normal gain mode, and provides much lower gains of 0 and -6.7 in the bypass-I and -II modes, respectively. It achieves a noise figure of 1.78 dB and a IIP3 of -12.8 dBm over the entire band.