• 센서학회지
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• 제20권4호
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• pp.272-278
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• 2011

Recently, the performance of binaural hearing aids is rapidly improved with the technology advancement of wireless communication, digital signal processing, and integrated circuit design. However, the previous hearing aids developer platforms can't be applied to binaural hearing aids developing, because it has no consideration for wireless communication and binaural hearing control. Also, the previous developer platforms are not easy to use for the algorithm development, because programming languages are limited. In this paper, we designed and implemented the open platform board for binaural hearing aids developing. The designed board can be programmed by general programming language and can be used wireless communication module. In order to verify the designed open platform board, we used the volume control algorithm using two open platform board. As a result of experiment, we verified the performance of designed and implemented open platform board that was successfully operated the binaural hearing control and the wireless communication.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2008년도 추계종합학술대회 B
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• pp.281-284
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• 2008

본 논문에서는 멀티미디어 SoC 플랫폼의 ASIC 설계에 대해 기술한다. 구현된 플랫폼은 32비트 OpenRISC1200 마이크로프로세서, WISHBONE 온 칩 버스, VGA 제어기, 디버그 인터페이스, SRAM 인터페이스 및 UART로 구성된다. 32 비트 OpenRISC1200 프로세서는 명령어 버스와 데이터 버스가 분리된 하버드 구조와 5단 파이프라인 구조를 가지고 VGA 제어기는 메모리로부터 읽은 이미지 파일에 대한 데이터를 RGB 값으로 CRT 혹은 LCD에 출력한다. 디버그 인터페이스는 플랫폼에 대한 디버깅 기능을 지원하고 SRAM 인터페이스는 18비트 어드레스 버스와 32비트 데이터 버스를 지원한다. UART는 RS232 프로토콜을 지원하는 시리얼 통신 기능을 제공한다. 본 플랫폼은 Xilinx VIRTEX-4 XC4VLX80 FPGA에 설계 및 검증되었다. 테스트 코드는 크로스 컴파일러로 생성되었고 JTAG 유틸리티 소프트웨어와 gdb를 이용하여 패러럴 케이블을 통해 FPGA 보드로 다운로드 하였다. 이 플랫폼은 최종적으로 Chartered 0.18um 공정을 이용하여 단일 ASIC 칩으로 구현 되었으며 100MHz 클록에서 동작함을 확인하였다.

• Journal of information and communication convergence engineering
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• 제6권4호
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• pp.376-382
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• 2008

Developing highly cost-efficient and reliable embedded systems demands hardware/software co-design and co-simulation due to fast TTM and verification issues. So, it is essential that Platform-Based SoC design methodology be used for enhanced reusability. This paper addresses a reusable SoC platform based on OpenCores soft processor with reconfigurable architectures for hardware/software codesign methodology. The platform includes a OpenRISC microprocessor, some basic peripherals and WISHBONE bus and it uses the set of development environment including compiler, assembler, and debugger. The platform is very flexible due to easy configuration through a system configuration file and is reliable because all designed SoC and IPs are verified in the various test environments. Also the platform is prototyped using the Xilinx Spartan3 FPGA development board and is implemented to a single chip using the Magnachip cell library based on $0.18{\mu}m$ 1-poly 6-metal technology.

• 한국위성정보통신학회논문지
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• 제7권3호
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• pp.130-134
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• 2012

본 논문에서는 소형 임베디드 시스템을 홈 네트워크 서비스 제어 시스템으로 활용하여 가정의 전기를 스마트폰을 이용하여 원격으로 제어함으로 에너지를 절약할 수 있는 시스템을 제안한다. 제안 시스템의 구성은 OpenWrt 임베디드 리눅스 기반의 소형 유무선공유기를 임베디드 시스템 개발 플랫폼으로 홈 네트워크 서비스 제어 시스템을 구현하였으며, Android 스마트폰 어플리케이션을 통한 원격 제어 기능 구현하였으며, 가정의 조명 시스템은 기존 인터페이스 보드에 LED를 연결하여 구성하였다. 프로토타입 시스템은 OpenWrt 운영체제가 설치된 Buffalo의 WZR-HP-G450H 유무선공유기, LED를 연결한 Arduino의 Uno 인터페이스 보드, Android 애플리케이션 개발 환경은 한백전자의 HBE-SM5-S4210 개발 키트를 이용하여 구현하였다. 동작 검증은 Android 기반 원격제어를 위한 TCP/IP 프로그래밍, 유무선공유기와 Android 개발 키트 인터페이스를 위한 소켓통신 프로그래밍, 유무선공유기와 인터페이스 보드 연결을 위한 UART 통신 프로그램으로 실행하였다. 구현 결과 소형 유무선공유기를 이용한 저 비용의 홈 네트워크 시스템의 가능성을 보여주었다.

• 한국인터넷방송통신학회논문지
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• 제16권6호
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• pp.75-81
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• 2016

본 논문에서 제시한 Co-creation 플랫폼 소프트웨어 분석/설계 방법은 제품의 아이디어 단계부터 제품의 디자인 단계, 개발 및 생산, 마케팅 전 과정에 Co-creation 개념을 적용한 Co-creation 플랫폼 구축기술을 제공한다. 그리고 이 방법은 Co-creation 플랫폼 구축을 위한 자체 SNS 기능 및 OPEN API 를 통하여 기업의 클라우드 서비스와 기업 시스템과 연동하도록 설계 및 구현이 가능하도록 한다. 또한 아이디어의 수정 및 완성 단계에서 위키 기술을 적용하고 디자인 제작과정에서 스토리보드 프로토타이핑 협업 도구를 제공함으로써 고객 및 이해관계자가 디자인 작업에 적극적으로 참여하고 의견이 반영이 가능하도록 하는 기능 구현이 가능하다. 따라서 이것들의 설계 과정을 효과적으로 보여주기 위하여 Co-creation 분석/설계를 객체지향 분석방법에 의해 제시하고자 한다.

• 한국컴퓨터정보학회논문지
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• 제22권8호
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• pp.47-53
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• 2017

In this paper, we present open hardware platforms for Internet of Things (IoTs) emphasizing their strengths and weaknesses. We introduce six representative platforms, Raspberry PI, Arduino, Garileo, Edison, Beagle board and Artik. We define important performance issues for open hardware platforms for IoTs and analyze recent platforms according to the performance issues. We present recent research project using open hardware platforms introduced in this paper. We believe that this paper provide wise view and necessary information for open hardware platforms for Internet of Things (IoT).

• 센서학회지
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• 제24권5호
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• pp.299-305
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• 2015

Since the natural disasters such as floods, droughts, heat wave and cold wave are increasing, the need for risk management is necessary to minimize the damage with utilizing IT technology. Also, the monitoring services of disaster response type have been developed and applied. Recently, the open source hardware based on the signal of the sensor, or the monitoring studies have been carried. In this paper, by analyzing a low-cost open source hardware platform such as Beagle board, we examine the utilization of the hardware-based module for sensor monitoring.

• 센서학회지
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• 제16권4호
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• pp.247-253
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• 2007

Low power consumption sensor network platform (sensor node) for sensor networking with IEEE 802.15.4 protocol was fabricated. The sensor node used ceramic bar type antenna for increasing RF signal performance and decreasing PCB size occupied by antenna. The communication range of the fabricated sensor node was about $20{\sim}30$ m in open environment with 915 MHz frequency bandwidth and well supported by Tiny OS. The sensor node have good connectivity with various external devices by RS-232, I2C, analogue and digital expansion board, hence, this sensor node can be applied to various applications in wireless sensor network and ubiquitous sensor network.

• 제어로봇시스템학회논문지
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• 제12권2호
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• pp.194-200
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• 2006

The SoC and digital technology development recently enabled the emergence of information devices and control devices because the SoC presents many advantages such like lower power consumption, greater reliability, and lower cost. However, it is nearly impossible to use the SoC without operating systems because the SoC is included with many peripherals and complex architecture. It is required to use embedded operating systems and real-time operating systems may be used as an embedded operating system. So far, real-time operating systems are widely used to implement a Real-Time system since it meets developer's requirements. However, real-time operating systems have disadvantages including a lack of standards, expensive development, and license. Embedded Linux is able to overcome their disadvantages. In this paper, the implementation of control system platform for a mobile robot using real-time Embedded Linux is described. As a control hardware system platform, XScale board is used. As the real-time Embedded Linux, RTAI is adopted which is open source and royalty free, and supports various architectures and real-time devices, such like real-time CAN and real-time COM. This paper shows the implementation of RTAI on XScale board that means the porting procedure. We also applied the control system platform to the mobile robot and compared the Real-Time serial driver with non real-time serial driver. Experimental results show that that using RTAI is useful to build real-time control system with powerful functionalities of Linux.

• 전기학회논문지
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• 제66권1호
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• pp.100-106
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• 2017

In this paper, we propose a parallel optimization method of Aho-Corasick (AC) algorithm and Parallel Failureless Aho-Corasick (PFAC) algorithm using Open Computing Language (OpenCL) on Field Programmable Gate Array (FPGA). The low throughput of string matching engine causes the performance degradation of network process. Recently, many researchers have studied the string matching engine using parallel computing. FPGA's vendors offer a parallel computing platform using OpenCL. In this paper, we apply the AC and PFAC algorithm on DE1-SoC board with Cyclone V FPGA, where the optimization that considers FPGA architecture is performed. Experiments are performed considering global id, local id, local memory, and loop unrolling optimizations using PFAC algorithm. The performance improvement using loop unrolling is 129 times greater than AC algorithm that not adopt loop unrolling. The performance improvements using loop unrolling are 1.1, 0.2, and 1.5 times greater than those using global id, local id, and local memory optimizations mentioned above.