• ETRI Journal
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• 제37권6호
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• pp.1188-1198
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• 2015

In this paper, a multi-time programmable (MTP) cell based on a $0.18{\mu}m$ bipolar-CMOS-DMOS backbone process that can be written into by using dual pumping voltages - VPP (boosted voltage) and VNN (negative voltage) - is used to design MTP memories without high voltage devices. The used MTP cell consists of a control gate (CG) capacitor, a TG_SENSE transistor, and a select transistor. To reduce the MTP cell size, the tunnel gate (TG) oxide and sense transistor are merged into a single TG_SENSE transistor; only two p-wells are used - one for the TG_SENSE and sense transistors and the other for the CG capacitor; moreover, only one deep n-well is used for the 256-bit MTP cell array. In addition, a three-stage voltage level translator, a VNN charge pump, and a VNN precharge circuit are newly proposed to secure the reliability of 5 V devices. Also, a dual memory structure, which is separated into a designer memory area of $1row{\times}64columns$ and a user memory area of $3rows{\times}64columns$, is newly proposed in this paper.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1999년도 추계종합학술대회 논문집
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• pp.925-928
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• 1999

A multi-channel gas leakage monitoring system was designed and fabricated by using CPLD(complex Programmable Logic .Device) for monitoring and controlling the leakage of natural gas from supplying-pipes under the ground. Fabricated SnO$_2$thick film gas sensor elements were attached on safeguard steel plate of natural gas supplying pipes, and the local monitoring system in this study received the signal from the gas sensors. The monitoring system was implemented by using CPLD chip to reduce the development time and implement simple one chip system. The time division multi-channel system received the input signal from individual gas sensor at one of divided times by multiplexor and signal processed sequentially. The system reduced the size of peripheral circuit resulted in implementation of creditable simple system.

• 한국CDE학회논문집
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• 제18권1호
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• pp.21-27
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• 2013

Presented in the paper is a log data based modeling method for effective construction of a virtual plant model which can be used for the virtual PLC (Programmable Logic Controller) simulation. For the PLC simulation, the corresponding virtual plant, consisting of virtual devices, is required to interact with the input and output symbols of a PLC. In other words, the behavior of a virtual device should be the same as that of the real device. Conventionally, the DEVS (Discrete Event Systems Specifications) formalism has been used to represent the behavior a virtual device. The modeling using DEVS formalism, however, requires in-depth knowledge in the simulation area, as well as the significant amount of time and efforts. One of the key ideas of the proposed method is to generate a plant model based on the log data obtained from the production system. The proposed method is very intuitive, and it can be used to generate the full behavior model of a virtual device. The proposed approach was applied to an AGV (Automated Guided Vehicle).

• 한국산학기술학회논문지
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• 제13권6호
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• pp.2697-2701
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• 2012

안티퓨즈 MOS 커패시터를 기반으로 제작된 OTP 소자의 수율은 프로그램 과정에서 입력 저항(Rin)값과 통과 트랜지스터(Pass Tr)의 크기, 데이터 읽기 과정에서 읽기 트랜지스터(Read Tr)와 읽기 전압에 영향을 받는다. 따라서 수율에 영향을 주는 요소를 분석하기 위해 여러 가지 실험 조건을 달리하여 각각의 조건에 대해 블로잉 후 실효소자의 저항 특성에 대한 풀 맵(full map) 데이터를 얻어 OTP 소자가 어떻게 동작하는지를 분석하여 수율 개선에 필요한 최적 조건을 연구하였다. 최적 조건은 입력저항이 $50{\Omega}$, 통과 트랜지스터의 W값이 $10{\mu}m$, 읽기 전압이 2.8 V 일 때이다.

• Smart Structures and Systems
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• 제14권6호
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• pp.1131-1150
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• 2014

One of the issues in extending the range of applicable problems of real-time hybrid simulation is the computation speed of the simulator when large-scale computational models with a large number of DOF are used. In this study, functionality of real-time dynamic simulation of MDOF systems is achieved by creating a logic circuit that performs the step-by-step numerical time integration of the equations of motion of the system. The designed logic circuit can be implemented to an FPGA-based system; FPGA (Field Programmable Gate Array) allows large-scale parallel computing by implementing a number of arithmetic operators within the device. The operator splitting method is used as the numerical time integration scheme. The logic circuit consists of blocks of circuits that perform numerical arithmetic operations that appear in the integration scheme, including addition and multiplication of floating-point numbers, registers to store the intermediate data, and data busses connecting these elements to transmit various information including the floating-point numerical data among them. Case study on several types of linear and nonlinear MDOF system models shows that use of resource sharing in logic synthesis is crucial for effective application of FPGA to real-time dynamic simulation of structural response with time step interval of 1 ms.

• 전기전자학회논문지
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• 제26권3호
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• pp.422-429
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• 2022

조도센서 칩은 아날로그 회로의 트리밍이나 디지털 레지스터의 초기 값을 셋팅하기 위해 소용량의 eFuse(electrical Fuse) OTP(One-Time Programmable) 메모리 IP(Intellectual Property)를 필요로 한다. 본 논문에서는 1.8V LV(Low-Voltage) 로직 소자를 사용하지 않고 3.3V MV(Medium Voltage) 소자만 사용하여 128비트 eFuse OTP IP를 설계하였다. 3.3V 단일 MOS 소자로 설계한 eFuse OTP IP는 1.8V LV 소자의 gate oxide 마스크, NMOS와 PMOS의 LDD implant 마스크에 해당되는 총 3개의 마스크에 해당되는 공정비용을 줄일 수 있다. 그리고 1.8V voltage regulator 회로가 필요하지 않으므로 조도센서 칩 사이즈를 줄일 수 있다. 또한 조도센서 칩의 패키지 핀 수를 줄이기 위해 프로그램 전압인 VPGM 전압을 웨이퍼 테스트 동안 VPGM 패드를 통해 인가하고 패키징 이후는 PMOS 파워 스위칭 회로를 통해 VDD 전압을 인가하므로 패키지 핀 수를 줄일 수 있다.

• 전기학회논문지
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• 제61권2호
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• pp.347-353
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• 2012

In this paper, authors will develop the quick and precise remote controller of automatic fire detection equipment (P-type one-class receiver) based on information communication technology (IT). The remote controller detects the fire and disaster in the building automatically and quickly and then activates the facilities to extinguish the fire and disaster, monitoring such situation in a real time through wire-wireless communication network. The proposed remote controller is applied a programmable logic device (PLD) micom. of one-chip type which is small size and lightweight and also has highly sensitive-precise reliabilities. The one-chip type PLD micom. analyzes digital signals from sensors, then activates fire extinguishing facilities for alarm and rapid suppression in a case of fire and disaster. The detected data is also transferred to a remote situation room through wire-wireless network of RS232c and bluetooth communication, and then the situation room sends an emergency alarm signal. The automatic fire detection equipment (AFDE) based on IT will minimize the life and wealth loss while prevents fire and disaster.

• 한국시뮬레이션학회논문지
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• 제18권4호
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• pp.67-79
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• 2009

자동차 제조 기업은 생산되는 제품 수명 주기가 짧기 때문에, 공정계획 및 라인 변경이 빈번히 일어난다. 따라서 새로운 공정을 계획하는 경우보다 기존 공정계획을 바탕으로 라인의 설비를 재배치하거나, 제어정보를 수정하는 경우가 많다. 하지만 생산라인의 제어 정보를 기술하는 표준 방법론이 없기 때문에 기존 공정의 정보를 해석하고 수정하는데 많은 노력이 요구된다. 따라서 본 논문에서는 자동화 생산라인에서 일반적으로 사용할 수 있는 제어레벨 공정 모델링 방법론(SOS-Net)을 제안하고자 한다. 제안된 방법론은 실제 현장라인과 동일한 Low Level의 정보들을 체계적으로 표현함으로써 모델링 결과가 현업에 직접 사용될 수 있도록 고려하였다. 본 논문에서 제안하는 SOS-Net은 쉽게 작성할 수 있으며, 기존의 High Level 모델링 방법들이 갖는 한계점을 극복하고, 현업에서 사용할 수 있는 FB(Function Block) 제어 코드를 생성하는 것을 목적으로 한다.

• ALGAE
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• 제25권1호
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• pp.37-44
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• 2010

A tide-simulating apparatus was developed for culturing marine macroalgae. The objective of this study was to introduce a novel tide-simulating apparatus that can simulate a diurnal or semi-diurnal tidal cycle in the laboratory. In this apparatus, the seaweeds are move up and down and the water level remains the same during the simulated tidal cycle. The apparatus consists of 18 cylindrical culture tanks (3 blocks $\times$ 6 culture tanks) with 12 cm diameter and 24.5 cm long containing up to 2.5 L of seawater. There is a horizontal plate which covered all 18 culture tanks, and it is raised and lowered by a programmable motor that can regulate exposure time. In one application, seaweeds are attached to braided twine hung on Plexiglas air-tubing. The air-tubing is attached to a lid that is set on a horizontal plate. This apparatus is made of colorless Plexiglas to maximize light transmittance. This apparatus is easily disassembled and transportable to any indoor laboratory, wet laboratory, greenhouse, etc. This apparatus also offers considerable flexibility in terms of design. The size of culture tank can be redesigned by either increasing the height of cylinder or/and using a different diameter of cylindrical Plexiglas, therefore, larger/taller thalli can be cultivated. Growth rates of three eulittoral Porphyra species from different tidal elevations have been compared using this device.

• 한국정보통신학회논문지
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• 제20권2호
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• pp.306-316
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• 2016

본 논문에서는 프로그램 선택 소자는 채널 폭이 큰 NMOS (N-channel MOSFET) 트랜지스터 대신 DNW (Deep N-Well) 안에 형성된 채널 폭이 작은 isolated NMOS 트랜지스터의 body인 PW (P-Well)과 source 노드인 n+ diffusion 영역 사이에 형성된 기생하는 접합 다이오드를 사용하는 NMOS-Diode eFuse OTP (One-Time Programmable) 셀을 제안하였다. 제안된 eFuse OTP 셀은 프로그램 모드에서 NMOS 트랜지스터에 형성되는 기생하는 접합 다이오드를 이용하여 eFuse를 blowing 시킨다. 그리고 읽기 모드에서는 접합 다이오드를 이용하는 것이 아니고 NMOS 트랜지스터를 이용하기 때문에 다이오드의 contact voltage 강하를 제거할 수 있으므로 '0' 데이터에 대한 센싱불량을 제거할 수 있다. 또한 읽기 모드에서 채널 폭이 작은 NMOS 트랜지스터를 이용하여 BL에 전압을 전달하므로 OTP 셀의 blowing되지 않은 eFuse를, 통해 흐르는 읽기 전류를 $100{\mu}A$ 이내로 억제하여 blowing되지 않은 eFuse가 blowing되는 문제를 해결할 수 있다.