• Title/Summary/Keyword: On-chip

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금속절삭시 CHIP 생성기구 및 절삭온도 예측을 위한 유한요소해석에 관한 연구

  • 황준;남궁석
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 1993.10a
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    • pp.22-27
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    • 1993
  • The finite element method is applied to analyze the mechanism of metal cutting. This paper introduces some effects, such constitutive deformation laws of workpiece material, friction of tool-chip contact interfaces, tool rake angles and also simulate the cutting process, chip formation and geometry, tool-chip contact, reaction force of tool, cutting temperature. Under the usual [lane strain assumption, quasi-static analysis were performed with variation of tool-chip interface friction coefficients and rake angles. In this analysis, various cutting speeds and depth of cut are adopted. Some cutting parameters are affected to cutting force, plastic deformation of chip, shear plane angle, chip thickness and tool-chip contact length and reaction forces on tool. Cutting temperature and Thermal behavior. Several aspects of the metal cutting process predicted by the finite element analysis provide information about tool shape design and optimal cutting conditions.

Design of MLC chip quadrature hybrid for 2 GHz band mobile communications (2 GHz대 이동 통신용 MLC 칩 90$^{\circ}$ 하이브리드 설계)

  • 심성훈;강종윤;윤석진;신현용;윤영중;김현재
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.115-118
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    • 2002
  • This paper presents the design method and performance characteristics of a chip-type quadrature hybrid using LTCC-MLC technology. The design method for a chip-type quadrature hybrid is based on lumped element equivalent circuit of quarter-wave transformer. The chip-type quadrature hybrid was miniaturized to a greater extent using multilayer structure and lumped element. The proposed design method can also reduce the undesirable parasitic effects of the chip-type quadrature hybrid. The proposed chip-type quadrature hybrid was designed and fabricated using the proposed design method and the equivalent circuit model of a quarter-wave transformer. Fabrication and measurement of designed chip-type quadrature hybrid show much smaller size than a conventional distributed quadrature hybrid and a good agreement with simulated results.

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Chip type discrimination by pattern recognition technique (패턴인식 기술에 의한 칩형태 판별)

  • Kang, Jong-Pyo;Choi, Man-Sung;Song, Ji-Bok
    • Journal of the Korean Society for Precision Engineering
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    • v.5 no.4
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    • pp.32-38
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    • 1988
  • Apaptive cintrol of machine tool is aimed to change cutting state satis- factorily without aid of a machine operator, if the cuting state is abnomal such as formation of tangled ribbon type chip, built-up edge and generation of chattering and so on. Among these the recognition of chip type is one of the most important since it has imlications relate to : 1. Safety of operator 2. Stoppage of work due to entanglment in tool and workpiece of chip 3. Problem of producted chip control In this paper the chip type is discriminatied by the pattern recognition technique. It is found that the power spectrum of cutting force for each chip type has it's own special pattern. Linear discriminant function for the recognition of the chip type is obtained by learning process. The discriminant function can be the basis of adaptive control for the rate of success of recognition by pattern recognition technique is at leasthigher than 83%.

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BER and Throughput Analyses of the Analytical Optimum Chip Waveform (해석적 최적 칩파형의 BER과 전송성능(Throughput) 분석)

  • Ryu, Heung-Gyoon;Chung, Ki-Ho;Lee, Dong-Hun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.13 no.7
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    • pp.641-648
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    • 2002
  • The study on the chip waveform design to minimize multiple-access interference (MAI) and its performance evaluation are very important since chip waveform decides the signal quality and system capacity of the direct-sequence CDMA wireless communication system. This paper suggests the analytical chip waveform to minimize the MAI. The BER and throughput performances achieved by the proposed analytical optimum chip waveform are compared with those of the conventional chip waveforms in the Nakagami-m distribution frequency selective channel when the differential phase shift keying (DPSK) is employed in DS-CDMA system. From the numerical results, capacity and throughput are improved about 2 times and 1.4 times respectively when it is compared with the Kaiser chip waveform that is considered as one of the best in the conventional ones.

ROM, RAM등의 on-chip化가 繼續되는 下位마이크로 컴퓨터

  • 송영재
    • The Magazine of the IEIE
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    • v.4 no.1
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    • pp.1-9
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    • 1977
  • 마이크로컴퓨터의 하위의 분야에서 ROM과 RAM등을 집적한 "1 chip마이크로컴퓨터 내지 1 chip microcontroller라고 불리우는 것이 몇 개 등장하고 있다. 작년 11월에 발표한 Intel사의 PROM실장의 1 chip 마이크로컴퓨터 MCS48은 이 움직임에 박차를 가하고 있다. 최근의 1 chip 마이크로컴퓨터의 기능과 기술적인 문제를 조사한 것이다.

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Giga-Hertz-Level Electromagnetic Field Analysis for Equivalent Inductance Modeling of High-Performance SoC and SiP Designs

  • Yao Jason J.;Chang Keh-Jeng;Chuang Wei-Che;Wang, Jimmy S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.5 no.4
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    • pp.255-261
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    • 2005
  • With the advent of sub-90nm technologies, the system-on-chip (SoC) and system-in-package (SiP) are becoming the trend in delivering low-cost, low-power, and small-form-factor consumer electronic systems running at multiple GHz. The shortened transistor channel length reduces the transistor switching cycles to the range of several picoseconds, yet the time-of-flights of the critical on-chip and off-chip interconnects are in the range of 10 picoseconds for 1.5mm-long wires and 100 picoseconds for 15mm-long wires. Designers realize the bottleneck today often lies at chip-to-chip interconnects and the industry needs a good model to compute the inductance in these parts of circuits. In this paper we propose a new method for extracting accurate equivalent inductance circuit models for SPICE-level circuit simulations of system-on-chip (SoC) and system-in-package (SiP) designs. In our method, geometrical meshes are created and numerical methods are used to find the solutions for the electromagnetic fields over the fine meshes. In this way, multiple-GHz SoC and SiP designers can use accurate inductance modeling and interconnect optimization to achieve high yields.

Reinforcement, Thermal and Fire Retardant Improvement of Phenolic Composites by Surface Treatment of CFRP Chip (CFRP Chip 표면처리에 따른 페놀복합재료의 강화, 내열성 및 난연성 향상)

  • Kwon, Dong-Jun;Wang, Zuo-Jia;Gu, Ga-Young;Park, Joung-Man
    • Journal of Adhesion and Interface
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    • v.13 no.2
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    • pp.58-63
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    • 2012
  • CFRP chip is the byproduct from carbon fiber reinforced plastic (CFRP) processing. CFRP chip is not simply a waste mainly composed of fine carbon fiber and epoxy resin. CFRP chip keeps matrix to maximize their reinforcing effect. To obtain a uniform length of carbon fiber in CFRP chip, chip was chopped ina mortar. CFRP chip should be purified to get better interface adhesion. Epoxy resin on the carbon fiber was removed by $H_2O_2$ surface etching treatment. Optimal dispersion and fabrication conditions of CFRP chip embedded in phenolic resin were determined by thermal stability for fire retardant applications. CFRP chip-phenolic composite exhibits better mechanical and thermal properties than neat phenolic resin. Surface condition of CFRP chip-phenolic composite was evaluated by static contact angle measurement. Contact angle of CFRP chip-phenolic composite was greater than neat phenolic due to heterogeneous condition of fine carbon fibers. From the evaluation for fire retardant (ASTM D635-06) test, thermal stability of CFRP chip-phenolic composite was found to be improved with higher concentration of CFRP chip.

Analysis of Chip Thickness Model in Ball-end Milling (볼엔드밀 가공의 칩두께 모델 해석)

  • Sim Ki-Joung;Mun Sang-Don
    • Transactions of the Korean Society of Machine Tool Engineers
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    • v.15 no.2
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    • pp.73-80
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    • 2006
  • This paper describes a analysis on the chip thickness model required for cutting force simulation in ball-end milling. In milling, cutting forces are obtained by multiplying chip area to specific cutting forces in each cutting instance. Specific cutting forces are one of the important factors for cutting force predication and have unique value according to workpiece materials. Chip area in two dimensional cutting is simply calculated using depth of cut and feed, but not simply obtained in three dimensional cutting such as milling due to complex cutting mechanics. In ball-end milling, machining is almost performed in the ball part of the cutter and tool radius is varied along contact point of the cutter and workpiece. In result, the cutting speed and the effective helix angle are changed according to length from the tool tip. In this study, for chip thickness model analysis, tool and chip geometry are analyzed and then the definition of chip thickness and estimation method are described. The resulted of analysis are verified by compared with geometrical simulation and other research. The proposed chip thickness model is more precise.

Single-Chip Microprocessor Control for Switched Reluctance Motor Drive

  • Hao Chen;Ahn, Jin-Woo
    • KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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    • v.2B no.4
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    • pp.207-213
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    • 2002
  • The paper introduces a switched reluctance motor drive system based on an 80C31 and an Intel 80C 196KB single-chip microprocessor control. Advance schemes are used in turn-on and turn-off angles with the power converter's main switches during traction and regenerative braking. The principles of traction speed control and braking torque control are given. The hardware and software patterns in the 80c31 and the Intel 80C196KB single-chip microprocessor control system are also presented.