• 제목/요약/키워드: Offset voltages

검색결과 47건 처리시간 0.029초

인버터의 전류측정 오차에 기인하는 영구자석형 동기전동기의 토크리플 저감

  • 홍순찬;윤덕용;원의연
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1996년도 창립기념 전력전자학술발표회 논문집
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    • pp.26-30
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    • 1996
  • This paper proposes a novel method to reduce the torque ripple due to the non-ideality of the current sensing parts in vector-controlled inverter-fed PMSM(Permanent Magnet Synchronous Motor) drive systems. The motor output torque equations are derived in terms of their offset voltages and different voltage transducing gains. And the effects of phase current errors on motor torque are analyzed for both salient PMSM and non-salient PMSM. The proposed method can eliminate the torque ripple by nulling the offset voltages and setting the voltage transducing gains to the same value. To verify the proposed method, digital simulations are carried out for non-salient PMSM.

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Advanced Static Over-modulation Scheme using Offset Voltages Injection for Simple Implementation and Less Harmonics

  • Lee, Dong-Myung
    • Journal of Electrical Engineering and Technology
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    • 제10권1호
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    • pp.138-145
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    • 2015
  • In this paper, a novel static overmodulation scheme (OVM) for space-vector PWM (SVPWM) is proposed. The proposed static OVM scheme uses the concept of adding offset voltages in linear region as well as overmodulation region to fully utilize DC-link voltage. By employing zero sequence voltage injection, the proposed scheme reduces procedures for achieving SVPWM such as complicated gating time calculation. In addition, this paper proposes a stepwise discontinuous angle movement in high modulation region in order to reduce Total Harmonic Distortion (THD). The validity of the proposed scheme is verified through theoretical analysis and experimental results.

옵셋오차전압이 포함된 계통 전압에 강인한 PLL 알고리즘 (Robust PLL Algorithms for Grid Voltage with DC Offset voltages)

  • 이충렬;전태원;이홍희;김흥근;노의철
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2016년도 전력전자학술대회 논문집
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    • pp.327-328
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    • 2016
  • This paper proposes the PLL algorithms with both the quadrature signal generator (QSG) and the positive-sequence calculator (PSC) in order to remove the effects of the three-phase grid voltage with dc offset voltages. The performances of the proposed method are verified with both the simulation result and the experimental result with 32-bit DSP.

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타원형 광구조물을 갖는 비분산 적외선 알코올 센서의 특성 (Characteristics of NDIR Alcohol Sensor with Elliptical Optical Structures)

  • 이승환;김진호;강병도;인정민
    • 자동차안전학회지
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    • 제7권2호
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    • pp.39-43
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    • 2015
  • NDIR (Non-dispersive infrared Rays) alcohol sensor has been prototyped and its temperature characteristics were measured. In order to design novel optical alcohol sensor, elliptical structures with one common foci were modeled and analyzed their optical properties. After analyzing elliptic optical structures, a prototype alcohol sensor module was tested according to the temperature variations from $-20^{\circ}C$ to $35^{\circ}C$. The offset voltages of alcohol sensor decreased from 1.1056 V at the temperature $-20^{\circ}C$ to 0.7339 V at $35^{\circ}C$. However, the highest sensitivity of alcohol sensor showed about $303{\mu}V/ppm$ at room temperature.

간략화 된 SVPWM을 적용한 4-Switch 3-Phase Inverter의 제어 방법 (Four-switch Three-phase Inverter control method applied by simplified Space Vector PWM)

  • 손상훈;박영주;최익
    • 한국전자통신학회논문지
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    • 제11권3호
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    • pp.283-292
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    • 2016
  • 6스위치 3상 인버터(SSTPI)의 한 상을 스위치 대신 커패시터로 대체한 4스위치 3상 인버터(FSTPI)에서 커패시터 전압의 불평형으로 인한 출력 전압의 오차를 보상하는 방법과 전압 제어 방법은 FSTPI의 성능을 결정짓는 중요한 요소이다. 본 논문에서는 DC 오프셋 전류 주입 통한 FSTPI의 커패시터 전압의 불평형을 보상하는 새로운 방법과 FSTPI의 새로운 전압 제어 방법인 간략화 된 SVPWM을 제안한다. 제안된 방법은 FSTPI로 SPMSM를 구동하는 시뮬레이션과 실험을 통해 그 타당성을 검증하였다.

유동 전하량 최소화를 통한 입력 오프셋 제거 CMOS 고속 비교기의 설계 (CMOS High Speed Input Offset Canceling Comparator Design with Minimization of Charges Transfer)

  • 이수형;신경민;이재형;정강민
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 1999년도 추계종합학술대회 논문집
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    • pp.963-966
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    • 1999
  • This Paper describes the design of high speed and low power comparator based on the feed forward bias control. Major building blocks of this comparator are composed of input offset canceling circuit and feed forward bias control circuit. The usual offset canceling circuit cancels the offset voltages by storing them in capacitors using MOS switches, The comparator of this paper employs the bias control circuit which generates bias signal from the input signal. The bias signal is applied to the capacitors and keeps the transfer of chares in the capacitors in the minimal amount, therefore making the comparator operate in stable condition and reduce decision time. The comparator in this form has very samll area and power dissipation. Maximum sampling rate is 200 Ms/sec. The comparator is designed in 0.65${\mu}{\textrm}{m}$ technology and the offset is less than 0.5㎷.

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DC 오프셋 전류 주입에 의한 4-Switch 3-Phase Inverter의 커패시터 전압 불평형 보상 (Compensation of Unbalanced Capacitor Voltage for Four-switch Three-phase Inverter Using DC Offset Current Injection)

  • 박영주;손상훈;최익
    • 한국전자통신학회논문지
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    • 제10권3호
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    • pp.365-373
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    • 2015
  • 기존 6스위치 3상 인버터(SSTPI)의 한 상을 스위치 대신 커패시터로 대체한 4스위치 3상 인버터(FSTPI)에서 양 커패시터 전압의 불평형에 의한 출력전압의 오차를 보상하는 것은 FSTPI의 성능을 결정하는 중요한 요소이다. 본 논문에서는 DC 오프셋 전류 주입에 의하여 FSTPI의 커패시터 전압 불평형을 보상하는 새로운 방법과 FSTPI에 적용할 수 있는 간략화된 SVPWM 방법을 제안한다. 제안된 방법은 컴퓨터 시뮬레이션을 통해 타당성을 검증하였다.

인버터의 전류측정 오차에 기인하는 교류전동기의 토크리플 저감 (Reduction of Torque Ripple due to Current-Sensing Errors in Inverter-Fed AC Motor Systems)

  • 윤덕용;홍순찬
    • 전력전자학회논문지
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    • 제3권4호
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    • pp.280-286
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    • 1998
  • 본 논문에서는 벡터제어방식의 인버터에 의하여 구동되는 교류전동기 제어 시스템에서 전류특정회로에서의 측정오차에 기인하는 전동기의 토크리플을 저감하는 방법을 제안한다. 2상의 전류를 측정하는 회로에서의 오프셋 전압과 전압증폭률이 서로 다를 때 전동기 출력토크에 발생되는 리플을 각각 정량적으로 분석하고, 이로부터 온라인 상태에서 실시간으로 토크리플을 제거할 수 있는 알고리즘을 제시하였다. 제안된 방식의 유용성을 확인하기 위하여 이를 영구자석형 동기전동기에 적용하였을 경우에 대하여 출력토크의 리플을 계산하고 이를 제거하는 알고리즘을 컴퓨터로 시뮬레이션하였다.

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Switching Voltage Modeling and PWM Control in Multilevel Neutral-Point-Clamped Inverter under DC Voltage Imbalance

  • Nguyen, Nho-Van;Nguyen, Tam-Khanh Tu;Lee, Hong-Hee
    • Journal of Power Electronics
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    • 제15권2호
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    • pp.504-517
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    • 2015
  • This paper presents a novel switching voltage model and an offset-based pulse width modulation (PWM) scheme for multilevel inverters with unbalanced DC sources. The switching voltage model under a DC voltage imbalance will be formulated in general form for multilevel neutral-point-clamped topologies. Analysis of the reference switching voltages from active and non-active switching voltage components in abc coordinates can enable voltage implementation for an unbalanced DC-source condition. Offset voltage is introduced as an indispensable variable in the switching voltage model for multilevel voltage-source inverters. The PWM performance is controlled through the design of two offset components in a subsequence. One main offset may refer to the common mode voltage, and the other offset restricts its effect on the quality of PWM control in related DC levels. The PWM quality can be improved as the switching loss is reduced in a discontinuous PWM mode by setting the local offset, which is related to the load currents. The validity of the proposed algorithm is verified by experimental results.

Design Parameter Optimization for Hall Sensor Application

  • Park, Chang-Sung;Cha, Gi-Ho;Kang, Hyun-Soon;Song, Chang-Sup
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2001년도 ICCAS
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    • pp.86.3-86
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    • 2001
  • Hall effect sensor using 7um, 1.7 ohm-cm or 10um, 3.5 ohm-cm Bipolar process was successfully developed. The Hall sensor consists of various patterns, such as regular shapes, rectangles, diamond, hexagon and cross shapes to optimize offset voltage and sensitivity for proper applications. In order to measure offset voltage in chip scale the Agilent company´s 4156C and Nano-Voltage Meter were used and the best structure in offset voltage was finally selected by using ceramic package. The patterns appear to be the quadri-rectangular patterns entirely and three-parallelogram patterns. The measured offset voltages were found to be about 173-365uV. Meanwhile, in ...

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