• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.9
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• pp.736-742
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• 1991

N$^{+}$poly gate NMOSFETs and p$^{+}$ poly gate (surface type) PMOSFETs with three different gate oxides(SiO2, NO, and ONO) were fabricated. The rapid thermal nitridation and reoxidation techniques have been applied to gate oxide formation. The current drivability of the ONO NMOSFET shows larger values than that of the SiO2 NMOSFET. The snap-back occurs at a lower drain voltage for SiO$_2$ cases for ONO NMOSFET. Under the maximum substrate current bias conditions, hot-carrier effects inducting threshold voltage shift and transconductance degradation were investigated. The results indicate that ONO films exhibit less degradation in terms of threshold voltage shift. It was confirmed that the ONO samples achieve good improvement of hot-carrier immunity. In a SiO$_2$ SC-PMOSFET, with significant boron penetration, it becomes a depletion type (normally-on). But ONO films show excellent impurity barrier properties to boron penetration from the gate.

• Clinical and Experimental Reproductive Medicine
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• v.43 no.3
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• pp.157-163
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• 2016

Objective: The decision to use in vitro fertilization (IVF), intracytoplasmic sperm injection (ICSI), or split insemination (IVF-ICSI) in the first cycle is based on the number of motile sperm. Hence, total fertilization failure (TFF) often occurs during IVF cycles, despite normozoospermia. To investigate whether the cumulative motile swim-up spermatozoa percentage at 22 hours post-insemination (MSPPI) is an indicator for ICSI, we analyzed TFF, fertilization, blastocyst development, chemical pregnancy, clinical pregnancy, and live birth rates. Methods: This prospective study was performed using data obtained from 260 IVF cycles. At 22 hours after insemination, the remaining swim-up spermatozoa were observed and divided into six groups according to MSPPI (<10%, 10% to <30%, 30% to <50%, 50% to <70%, 70% to <90%, and 90% to 100%). Results: Regardless of the ejaculated motile sperm concentration ($0.6-280{\times}10^6/mL$ motile spermatozoa), the incidence of TFF significantly increased when MSPPI was <10%, and the fertilization rate significantly decreased when MSPPI was <30%. We found that cumulative MSPPI correlated with the cumulative fertilization rate (Spearman correlation, 0.508, p<0.001). Regarding embryo development, we observed no significant differences in the rates of blastocyst development, chemical pregnancy, clinical pregnancy, or live birth among all groups. Conclusion: Our findings suggest that MSPPI is a viable indicator for split IVF-ICSI and ICSI. Taken together, by employing the MSPPI test in advance before IVF, ICSI, or split IVF-ICSI cycles, unnecessary split IVF-ICSI and ICSI may be avoided.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.305-309
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• 2002

We have successfully fabricated a Metal-Ferroelectric-Insulator-Semiconductor (MFIS) structure using Bi$\sub$4-x/La$\sub$x/Ti$_3$O$\sub$12/ (BLT) ferroelectric thin film and SiO$_2$/Nitride/SiO$_2$ (ONO) stacked buffer layers for single transistor type ferroelectric nonvolatile memory applications. BLT films were deposited on 15 nm-thick ONO buffer layer by sol-gel spin-coating. The dielectric constant and the leakage current density of prepared ONO film were measured to be 5.6 and 1.0 x 10$\^$-8/ A/$\textrm{cm}^2$ at 2MV/cm, respectively, It was interesting to note that the crystallographic orientations of BLT thin films were strongly effected by pre-bake temperatures. X-ray diffraction patterns showed that (117) crystallites were mainly detected in the BLT film if pre-baked below 400$^{\circ}C$. Whereas, for the films pre-baked above 500$^{\circ}C$, the crystallites with preferred c-axis orientation were mainly detected. From the C-V measurement of the MFIS capacitor with c-axis oriented BLT films, the memory window of 0.6 V was obtained at a voltage sweep of ${\pm}$8 V, which evidently reflects the ferroelectric memory effect of a BLT/ONO/Si structure.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.06a
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• pp.79-82
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• 1998

Film characteristics of thin ONO dielectric layers for MONOS(metal-oxide-nitride-oxide-semiconductor) EEPRM was investigated by AES and AFM. Second derivative spectra of AES Si LVV overlapping peak provided useful information for chemical state analysis of superthin film. The ONO films with dimension of tunneling oxide 24${\AA}$, nitride 33${\AA}$, and blocking oxide 40${\AA}$ were fabricated. During deposition of the LPCVD nitride films on tunneling oxide, this thin oxide was nitrized. When the blocking oxide were deposited on the nitride film, the oxygen not only oxidized the nitride surface, but diffused through the nitride. The results of ONO film analysis exhibits that it is made up of SiO$_2$(blocking oxide)/O-rich SiON(interface/N-rich SiON(nitride)/-rich SiON(interface)/N-rich SiON(nitride)/O-rich SiON(tunneling oxide).

• Journal of the Korean Vacuum Society
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• v.3 no.1
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• pp.71-76
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• 1994

The electrical characteristics of the capacitor dielectric films of amorphous silicon-nit-ride-oxide(ANO) structures are compared with the capacitor dielectric films of oxide-nitride-oxide (ONO) structrues The electrical characteristics of ONO and ANO films were evaluated by high frequency(1 MHz) C-V high frequency C-V after constant voltage stree I-V TDDB and refresh time measurements. ANO films shows good electrical characteristics such as higher total charge to breakdown storage capacitance and longer refresh time than ONO films. Also it makes little difference that leakage current and flat band voltage shyift(ΔVfb)of ANO ana ONO films.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.8 no.3
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• pp.424-430
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• 1998

Film characteristics of thin ONO dielectric layers for MONOS (metal-oxide-nitride-oxide-semiconductor) EEPROM was investigated by AES, SIMS, TEM and AFM. The ONO films with different dimension of tunneling oxide, nitride, and blocking oxide were fabricated. During deposition of the LPCVD nitride films on tunneling oxide, this thin oxide was nitrized. When the blocking oxide were deposited on the nitride film, the oxygen not only oxidized the nitride surface, but diffused through the nitride. The results of ONO film analysis exhibits that it is made up of $SiO_2$(blocking oxide)/O-rich SiOxNy (interface)/ N-rich SiOxNy(nitride)/O-rich SiOxNy(tunneling oxide). In addition, the SiON phase is distributed mainly near the tunneling oxide/nitride and nitride/blocking oxide interfaces, and the $Si_2NO$ phase is distributed mainly at nitride side of each interfaces and in tunneling oxide.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.12
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• pp.1065-1070
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• 2003

HTO(High Temperature Oxide) films are mainly used as a gate insulator for polysilicon thin film transistors(Poly-Si TFT's). The HTO films, however, show the demerits of a high leakage current and a low electric breakdown voltage comparing with conventional thermal oxides even though they have a better surface in roughness than the thermal oxides. In this paper, we propose an ONO(Oxide-Nitride-Oxide) multilayer as the gate insulator for poly-Si TFT's. The leakage current and electric breakdown voltage of the ONO and HTO were measured. The drain current variation of poly-Si TFT's with a variety of gate insulators was observed. The thickness optimization in ONO films was carried out by studying I$\_$on/I$\_$off/ ratio of the poly-Si TFT's as a function of the thickness of ONO film adopted as gate insulator.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.10
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• pp.82-90
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• 2013

An Optical Network-on-Chip(ONoC) based on silicon photonics is one of promising technology for next generation exascale computing architectures. Recent active researches on ONoC focus on improving bandwidth further and avoiding path collisions by using wavelength division multiplexing (WDM). However, the number of wavelengths used for the WDM increases linearly as the number of Processing Element (PE) increases in existing ONoCs which adopt centralized routing architecture. The problem will also arises growing cost of optical devices such as light switches and light sources and limits the scalability of ONoC due to the sinal loss caused by interference of distinct light sources. In this paper, we proposes a distributed routing architecture for ONoC which is based on 2D-mesh structure using WDM technique and present a method that minimize the required number of wavelengths exploiting the connectivity of communication. In comparison with existing centralized routing architectures, results show reduction by 56% of the number of wavelengths and 21% of the number of optical switches in $8{\times}8$ networks.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.308-308
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• 2012

현재 결정질 태양전지 제작에 있어 공정 단가 및 재료비 절감을 위해 실리콘 웨이퍼의 두께가 점점 얇아지는 추세이며, 이에 따른 장파장 영역 흡수 손실을 감소시키기 위한 방안으로 후면 패시베이션에 관한 연구가 활발히 진행되고 있다. 후면 패시베이션층으로는 SiO2, SiNx, a-Si:H, SiOxNy 등의 물질이 사용되고 있으며, 본 연구에서는 SiO2/SiNx/SiO2 (ONO)의 삼중막 구조를 패시베이션층으로 하여 SiNx 단일막 구조와의 열처리 온도에 따른 소수캐리어 수명(${\tau}eff$), 후면 재결합속도(Seff), 확산거리(LD) 등의 파라미터 변화를 비교하였다. 증착 직후와 $350^{\circ}C$에서의 Forming Gas Annealing (FGA), 그리고 $800^{\circ}C$의 고온에서의 fast firing 후의 각각의 파라미터 변화를 관찰하였다. 증착 직후 SiNx 단일막과 ONO 삼중막의 소수캐리어 수명은 각각 $108{\mu}s$와 $145{\mu}s$를 보였다. 후면 재결합속도는 65 cm/s와 44 cm/s를 보였으며, 확산거리는 각각 $560{\mu}m$와 $640{\mu}m$를 나타내었다. FGA와 firing 열처리 후 세 파마미터는 모두 향상된 값을 보였으며 최종 firing 처리 후 단일막과 삼중막의 소수캐리어 수명은 각각 $196{\mu}s$와 $212{\mu}s$를 보였다. 또한 후면 재결합속도는 28 cm/s와 24 cm/s를 보였으며, 확산거리는 각각 $750{\mu}m$와 $780{\mu}m$를 보여 ONO 삼중막 구조의 경우에서 보다 우수한 특성을 보였다. 본 실험을 통해 SiNx 단일막보다 ONO 패시베이션 구조에서의 열적안정성이 우수함을 확인하였으며, 또한 ONO 패시베이션 구조는 열적 안정성뿐 아니라 n-type 도핑을 위한 Back To Back (BTB) 도핑 공정 시 후면으로 의 도펀트 침투를 막는 차단 층으로서의 역할도 기대할 수 있다.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.264-264
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• 2011

1T-1C로 구성되는 기존의 dynamic random access memory (DRAM)는 데이터를 저장하기 위해 적절한 커패시턴스를 확보해야 한다. 따라서 커패시터 면적으로 인한 집적도의 한계에 직면해있으며, 이를 대체하기 위한 새로운 DRAM인 1T- DRAM이 연구되고 있다. 기존의 DRAM과 달리 silicon-on-insulator (SOI) 기술을 이용한 1T-DRAM은 데이터 저장을 위한 커패시터가 요구되지 않는다. 정공을 채널의 중성영역에 축적함으로서 발생하는 포텐셜 변화를 이용하며, 이때 발생하는 드레인 전류차를 이용하여 '0'과 '1'을 구분한다. 기존의 완전공핍형 평면구조의 1T-DRAM은 소스 및 드레인 접합부분에서 발생하는 누설전류로 인해 '0' 상태의 메모리 유지특성이 열화되는 단점을 가지고 있다. 따라서 메모리의 보존특성을 향상시키기 위해 소스/드레인 접합영역을 줄여 누설전류를 감소시키는 구조를 갖는 1T-DRAM의 연구가 필요하다. 또한 고유전율을 가지는 Si3N4를 이용한 oxide-nitride-oxide (ONO)구조의 게이트 절연막을 이용하면 동일한 두께에서 더 낮은 equivalent oxide thickness (EOT)를 얻을 수 있기 때문에 보다 저 전압에서 1T-DRAM 동작이 가능하여 기존의 SiO2 단일층을 이용한 1T-DRAM보다 동일 전압에서 더 큰 sensing margin을 확보할 수 있다. 본 연구에서는 누설전류를 감소시키기 위하여 소스 및 드레인이 채널위로 올려진 recessed channel 구조에 ONO 게이트 절연막을 적용한 1T-DRAM을 제작 및 평가하고, 본 구조의 1T-DRAM적용 가능성 및 ONO구조의 게이트 절연막을 이용한 sensing margin 개선을 확인하였다.