• 대한원격탐사학회:학술대회논문집
• /
• 대한원격탐사학회 2002년도 Proceedings of International Symposium on Remote Sensing
• /
• pp.587-592
• /
• 2002

A new digital correlator fur an airborne synthetic aperture radiometer was designed in order to replace the conventional analog correlator unit which will become very complicated while the number of channels is increasing. The digital correlator uses digital IQ demodulator instead of the intermediate frequency (IF) phase shifter to make the correlation processing performed digitally at base band instead of analogly at IF. This technique has been applied to the digital receiver in softradio. The down-converted IF signals from each pair of receiver channels become low rate base-band digital signals after under-sampled, Digitally Down-Converted (DDC), decimated and filtered by FIR filters. The digital signals are further processed by two digital multipliers (complex correlation), the products are integrated by the integrators and finally the outputs from the integrators compose of the real part and the imaginary part of a sample of the visibility function. This design is tested by comparing the results from digital correlators and that from analog correlators. They are agreed with each other very well. Due to the fact that the digital correlators are realized with the help of Analog-Digital Converter (ADC) chips and the FPGA technology, the realized volume, mass, power consumption and complexity turned out to be greatly reduced compared with that of the analog correlators. Simulations show that the resolution of ADC has an influence on the synthesized antenna patterns, but this can be neglected if more than 2bit is used.

• 대한전기학회논문지
• /
• 제38권12호
• /
• pp.983-994
• /
• 1989

This paper presents a new variable structure model following control algorithm for control of manipulators. The reference model is a simple double integrators and the acceleration input for the robot manipulator consists of a proportional and derivative controller for the purpose of trajectory tracking. The control algorithm is derived by using Lyapunov stability theory instead of S.S < O, as is usual in the current VSS controller design. This proposed control algorithm does not require good knowledge of the parameter in the inertia matrix and is easily extendable to robot manipulators with a higher number of links. Also, the new algorithm is computationally fast because of not requiring the matrix inversion. The computer simulation was carried out to evaluate the performance of the proposed VSMFC.

• 한국조명전기설비학회:학술대회논문집
• /
• 한국조명전기설비학회 2009년도 추계학술대회 논문집
• /
• pp.231-234
• /
• 2009

IEC 61850 based substation automation system is operating under digital network with a number of IEDs and a HMI as relation of server and client. In case of IEDs, before implementing the system, all of the system integrators require IEC 61850 certificate from individual IED manufacture. Otherwise, there is nothing to verify IED for constructing substation automation system at the real substation. This paper shows verification strategy of IEC 61850 communication reliability such as association /release, report, dataset and four type control function.

• 대한전기학회논문지:시스템및제어부문D
• /
• 제54권2호
• /
• pp.87-89
• /
• 2005

The necessary and sufficient conditions for the linearization of the nonlinear control systems via restricted dynamic feed back have been found. These require checking with almost all indices from 0 to 2n-3. In this paper, we exploit the inherent structure of the system and find an efficient method to find linearizability of the system by reducing the range of the index to check. Our examples show the efficiency of our method.

• 한국가금학회지
• /
• 제20권2호
• /
• pp.107-114
• /
• 1993

The structure change in the broiler industry of Korea has been taking place very rapidly toward the direction of integrated production and marketing system. During the course of the evolution into the integrated structure, however, a number of small business entities, uncountable nationally but a minimum of a dozen, that previously engaged in the supply of production factors or live bird transaction also tended to get involved in the new system as a disguised or pseudo-integrator, having brought a lot of problems not only to the farmers but also to the development of integrated structure. The pseudo-integrator is generally characterized by limited functions in such a way of supplying chicks and feeds to and collecting grown birds from farmers under the contract at a fixed farmer's payment in practically the same pattern as a partial or quasi-integration, which intends to act as if an integrator in a stratagem to simply enjoy a margin simply from selling supplies and buying products for a certain period of time. The grower making a contract with appears to be a farmer who used to be an Independent and speculating but not able to join in the normal system of evolving integration. The problems of a pseudo-integrator center on the financial loss to a contract farmer, because the falsified integrator has to become easily bankrupt and run away when the price of live broiler continually stays below the cost of production, even though he is able to make a tremendous profit otherwise which is the real purpose of the operation for. It is true that the volatile market, fluctuating the price up more than doubled in a month and down to a half in a few weeks, makes the pseudo-integrator find the room for such a fraudulence. In addition, its activity also adversely affect the evolution of the integration due to rather negative image on structure change in general. It is recommended that the farmers need to better understand the real picture of the integrated system so as not to be swindled by a disguised, small scale agribusiness agent. By the same token, it is also equally required to have the whole industry integrated completely as early as possible. The Joint effort to get rid of pseudo-integrators' problems shall be put for the industry development moving toward the integration. No doubt a pseudo-integrator must be a temporary player for chance emerging during the course of structure change into the integrated, though.

• 한국정보전자통신기술학회논문지
• /
• 제13권1호
• /
• pp.8-16
• /
• 2020

본 논문에서는 polymerase chain reaction (PCR) 응용에 적합한 저잡음 CMOS 이미지 센서에 사용되는 컬럼-패러럴 analog-to-digital converter (ADC) 어레이를 위한 cascaded-of-integrator feedforward (CIFF) 구조의 단일 비트 2차 델타-시그마 모듈레이터를 제안하였다. 제안된 모듈레이터는 CMOS 이미지 센서에 입사된 빛의 신호에 해당하는 픽셀 출력 전압을 디지털 신호로 변환시키는 컬럼-패러럴 ADC 어레이를 위해 하나의 픽셀 폭과 동일한 10㎛ 컬럼 폭 내에 2개의 스위치드 커패시터 적분기와 단일 비트 비교기로 구현하였다. 또한, 모든 컬럼의 모듈레이터를 동시에 구동하기 위한 주변 회로인 비중첩 클록 발생기 및 바이어스 회로를 구성하였다. 제안된 델타-시그마 모듈레이터는 110nm CMOS 공정으로 구현하였으며 12kHz 대역폭에 대해 418의 oversampling ratio (OSR)로 88.1dB의 signal-to-noise-and-distortion ratio (SNDR), 88.6dB의 spurious-free dynamic range (SFDR) 및 14.3비트의 effective-number-of-bits (ENOB)을 달성하였다. 델타 시그마 모듈레이터의 면적 및 전력 소비는 각각 970×10 ㎛2 및 248㎼이다.

• 전자공학회논문지
• /
• 제51권10호
• /
• pp.57-63
• /
• 2014

본 논문은 전력소모와 면적을 줄인 지연된 피드-포워드 경로를 갖는 3차 SDM 구조를 제안하였다. 제안한 SDM은 기존의 적분기 2개로 구현된 3차 SDM(Sigma-Delta Modulator) 구조를 개선하였다. 제안된 구조에서는 기존 구조의 둘째 단에 지연된 피드-포워드 경로를 삽입함으로써 첫째 단의 계수 값을 2배로 증가시킬 수 있어 기존구조에 비하여 첫째 단 적분기 커패시터($C_I$)를 1/2로 감소시킬 수 있다. 그러므로 첫째 단 적분기의 부하 커패시턴스가 1/2로 작아지기 때문에 첫째 단 연산증폭기의 출력전류는 51%, 첫째 단의 커패시터 면적은 48% 감소되어 제안한 구조는 전력과 면적을 최적화 할 수 있다. 본 논문에서 제안한 구조를 이용하여 설계된 3차 SC SDM은 $0.18{\mu}m$ CMOS 공정에서 공급전압 1.8V, 입력신호 1Vpp/1KHz, 신호대역폭 24KHz, 샘플링 주파수 2.8224MHz 조건으로 시뮬레이션 하였다. 그 결과 SNR(Signal to Noise Ratio) 88.9dB, ENOB(Effective Number of Bits) 14비트이고 SDM의 전체 전력소모는 $180{\mu}W$이다.

• 한국정보전자통신기술학회논문지
• /
• 제13권3호
• /
• pp.184-196
• /
• 2020

본 논문에서는 배터리 관리 시스템 (BMS)에서 2차 전지 배터리를 통해 흐르는 전류의 정밀한 측정을 위한 cascaded-of-integrator feedforward (CIFF) 구조의 단일 비트 2차 델타-시그마 모듈레이터를 제안하였다. 제안된 모듈레이터는 2개의 스위치드 커패시터 적분기, 단일 비트 비교기, 비중첩 클록 발생기 및 바이어스와 같은 주변 회로로 구현하였다. 제안된 구조는 낮은 공통 모드 입력 전압을 가지는 low-side 전류 측정 방법에 적용되도록 설계되었다. Low-side 전류 측정 방법을 사용하면 회로 설계에 부담이 줄어들게 되는 장점을 가진다. 그리고 ±30mV 입력 전압을 15비트 해상도를 가지는 ADC로 분해하기 때문에 추가적인 programmable gain amplifier (PGA)를 구현할 필요가 없어 수 mW의 전력소모를 줄일 수 있다. 제안된 단일 비트 2차 CIFF 델타-시그마 모듈레이터는 350nm CMOS 공정으로 구현하였으며 5kHz 대역폭에 대해 400의 oversampling ratio (OSR)로 95.46dB의 signal-to-noise-and-distortion ratio (SNDR), 96.01dB의 spurious-free dynamic range (SFDR) 및 15.56비트의 effective-number-of-bits (ENOB)을 달성하였다. 델타 시그마 모듈레이터의 면적 및 전력 소비는 각각 670×490㎛2 및 414㎼이다.