• Transactions on Electrical and Electronic Materials
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• v.5 no.6
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• pp.241-243
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• 2004

The phase transition between amorphous and crystalline states in chalcogenide semiconductor films can be controlled by electrical or pulsed laser beam; hence some chalcogenide semiconductor films can be applied to electrically write/erase nonvolatile memory devices, where the low conductive amorphous state and the high conductive crystalline state are assigned to binary states. In this letter, the characteristics of phase transition in differential chalcogenide thin film are investigated. Al was used for the electrode as the thickness of 100, 300, 500 nm, respectively.

• Electrical & Electronic Materials
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• v.6 no.3
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• pp.220-227
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• 1993

본 논문에서는 산화막의 두께가 23.angs.이며 질화막의 두께를 각각 530.angs., 1000.angs.으로한 캐패시터형 MNOS소자를 제작하고 기억특성을 비교, 분석하였다. 특성조사를 위해 자동 .DELTA. $V_{FB}$ 추적장치를 설계, 제작하여 사용하였다. 기억트랩밀도는 질화막 두께 530.angs.인 소자가 1000.angs.인 소자보다 0.18 x $10^{16}$ $m^{-2}$ 크며, 0.31 x $10^{8}$ V/m 낮은 산화막 전기장에서 전자가 주입되었으며 $10^{4}$sec경과후 포획전자의 유지율도 우수하였다. 또한 포획된 전자는 실리콘쪽으로의 역터넬링으로 인한 감쇠가 우세하게 나타났다. 펄스전압 인가에 따른 플랫밴드전압의 변화가 선형적으로 증가하는 영역에서는 산화막 전류가 지배적이었으며 포화하다 감소하는 영역에서는 질화막 전류의 영향이 컸다. 소거동작은 포획된 전자의 방출과 실리콘으로 부터의 정공주입이 동시에 일어남을 관측하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.340-343
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• 2004

The phase transition between amorphous and crystalline states in chalcogenide semiconductor films can controlled by electric pulses or pulsed laser hem: hence some chalcogenide semiconductor films can be applied to electrically write/erase nonvolatile memory devices, where the low conductive amorphous state and the high conductive crystalline state are assigned to binary states. This letters researched into the characteristic of phase change transition in differential Chalcogenide thin films materials. The electrode used Al and experimented on 100nm, 300nm, 500nm respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.377-380
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• 2004

The phase transition between amorphous and crystalline states in chalcogenide semiconductor films can controlled by electric pulses or pulsed laser beam; hence some chalcogenide semiconductor films can be applied to electrically write/erase nonvolatile memory devices, where the low conductive amorphous state and the high conductive crystalline state are assigned to binary states. GeSbTe(GST), AsSbTe(AST), SeSbTe(SST) used to phase change materials by appling electrical pulses. Thickness of ternary chalcogenide thin films have about 100nm. Upper and lower electrode were made of Al. It is compared with I-V characteristics after impress the variable pulses.

• Journal of Korea Society of Industrial Information Systems
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• v.18 no.4
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• pp.9-18
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• 2013

Flash memory is mostly used on smart devices and embedded systems because of its nonvolatile memory, low power, quick I/O, resistant shock, and other benefits. Generally the typical file systems base on the NAND flash memory are YAFFS2, JFFS2, UBIFS, and etc. In this paper, we had variously made an experiment regarding I/O performance using our schemes and the UBIFS of the latest Linux Kernel. The proposed I/O performance analyses were classified as a sequential access and a random access. Our experiment consists of 6 cases using kmalloc(), vmalloc(), and kmem_cache(). As a result of our experiment analyses, the sequential reading and the sequential rewriting increased by 12%, 11% when the Case 2 has applied vmalloc() and kmalloc() to the UBI subsystem and the UBIFS. Also, the performance improved more by 7.82%, 6.90% than the Case 1 at the random read and the random write.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.07a
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• pp.743-746
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• 2000

Metal-ferroelectric-insulator-semiconductor(MFIS) devices using Pt/$LiNbO_3$/Si structure were successfully fabricated. The dielectric constant of the AIN film calculated from the capacitance in the accumulation region in the capacitance-voltage(C-V) curve was about 8.2. The gate leakage current density of MIS devices using a aluminum electrode showed the least value of 1$\times$$1O^{-8}$A/$cm^2$ order at the electric field of 500kV/cm. The dielectric constant of $LiNbO_3$film on AIN/Si structure was about 23 derived from 1MHz capacitance-voltage (C-V) measurement and the resistivity of the film at the field of 500kV/cm was about 5.6$\times$ $1O^{13}$ $\Omega$.cm.

• Journal of the Korean institute of surface engineering
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• v.55 no.5
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• pp.247-260
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• 2022

Since the first report on ferroelectricity in Si-doped hafnia (HfO2), this emerging ferroelectrics have been considered promising for the next-generation semiconductor devices with their characteristic nonvolatile data storage. The robust ferroelectricity in the sub-10-nm thickness regime has been proven by numerous research groups. However, extending their scalability below the 5 nm thickness with low temperature processes compatible with the back-end-of-line technology. In this review, therefore, the current status, technical issues, and their potential solutions of atomic layer deposition (ALD) of HfO₂-based ferroelectrics are comprehensively reviewed. Several technical issues in the physical scaling of the ferroelectric thin films and potential solutions including advanced ALD techniques including discrete feeding ALD, atomic layer etching, and area selective ALD are introduced.

• Journal of Information Display
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• v.10 no.4
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• pp.149-157
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• 2009

Reported herein is the architecture for a nonvolatile n-type memory paper field-effect transistor. The device was built via the hybrid integration of natural cellulose fibers (pine and eucalyptus fibers embedded in resin with ionic additives), which act simultaneously as substrate and gate dielectric, using passive and active semiconductors, respectively, as well as amorphous indium zinc and gallium indium zinc oxides for the gate electrode and channel layer, respectively. This was complemented by the use of continuous patterned metal layers as source/drain electrodes.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.255-255
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• 2010

Recently, nonvolatile memories (NVM) of various types have been researched to improve the electrical performance such as program/erase voltages, speed and retention times. Also, the charge trap memory is a strong candidate to realize the ultra dense 20-nm scale NVM. Furthermore, the high charge efficiency and the thermal stability of SiC nanocrystals NVM with single $SiO_2$ tunnel barrier have been reported. [1-2] In this study, the SiC charge trap NVM was fabricated and electrical properties were characterized. The 100-nm thick Poly-Si layer was deposited to confined source/drain region by using low-pressure chemical vapor deposition (LP-CVD). After etching and lithography process for fabricate the gate region, the $Si_3N_4/SiO_2/Si_3N_4$ (NON) and $SiO_2/Si_3N_4/SiO_2$ (ONO) barrier engineered tunnel layer were deposited by using LP-CVD. The equivalent oxide thickness of NON and ONO tunnel layer are 5.2 nm and 5.6 nm, respectively. By using ultra-high vacuum magnetron sputtering with base pressure 3x10-10 Torr, the 2-nm SiC and 20-nm $SiO_2$ were successively deposited on ONO and NON tunnel layers. Finally, after deposited 200-nm thick Al layer, the source, drain and gate areas were defined by using reactive-ion etching and photolithography. The lengths of squire gate are $2\;{\mu}m$, $5\;{\mu}m$ and $10\;{\mu}m$. The electrical properties of devices were measured by using a HP 4156A precision semiconductor parameter analyzer, E4980A LCR capacitor meter and an Agilent 81104A pulse pattern generator system. The electrical characteristics such as the memory effect, program/erase speeds, operation voltages, and retention time of SiC charge trap memory device with barrier engineered tunnel layer will be discussed.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.11
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• pp.27-32
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• 1999

Metal-ferroelectric-semiconductor devices by susing rapid thermal annealed $LiNbO_3/Si$(100) structures were fabricated and demonstrated nonvolatile memory operations. The estimated field-effect electron mobility and transconductance on a linear region of the fabricated FET were about $600cm^2/V{\cdot}s$ and 0.16mS/mm, respectively. The ID-VG characteristics of MFSFET's showed a hysteresis loop due to the ferroelectric nature of the $LiNbO_3 films. The drain current of the on state was more than 4 orders of magnitude larger than the off state current at the same read gate voltage of 0.5V, which means the memory operation of the MFSFET. A write voltage as low as ${\pm}3V$, which is applicable to low power integrated circuits, was used for polarization reversal. The ferroelectric capacitors showed no polarization degradation up to $10^{10}$ switching cycles with the application of symmetric bipolar voltage pulse (peak-to-peak 6V, 50% duty cycle) of 500kHz.