• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.671-674
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• 2003

본 논문에서는 Cobalt interlayer 와 Titanium Nitride(TiN) capping layer를 Ni SALICIDE의 단점인 열 안정성과 sheet resistance 와 series 저항을 감소시키는데 적용하여 0.lum 급 CMOS 소자의 특성을 연구하였다. 첫째로, Ni/Si 의 interface 에 Co interlayer 를 증착하여 Nickel Silicide의 단점인 열 안정성 평가인 700℃, 30min의 furnace annealing 후에 낮은 sheet resistance와 누설전류를 줄일 수 있었다. 두번째로, TiN caping layer를 적용하여 실리사이드 형성시 산소와의 반응을 막아 실리사이드의 표면특성을 향상시켜 누설전류의 특성을 개선하였다. 결과적으로 소자의 구동전류 향상, 누설전류 저하, 낮은 면저항으로 소자의 특성을 개선하였다.

• 한국재료학회지
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• 제17권7호
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• pp.358-360
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• 2007

Cobalt subtitution on NiSi is investigated by using an ab-initio calculation. Firstly, a relaxed NiSi structure is calculated and the calculated lattice parameters are compared with experimentally determined lattice parameters. The calculated values are smaller than the experimental values by about 2%. As the calculation is based on 0 K, and the experimental measurement is performed at room temperature, those values are in good agreement. Next, a Co atom substitutes a Ni and Si site, respectively, to evaluate the preferable site between them. Co prefers Ni site to Si site. The calculated total energy also indicates that the Co substitution to Ni site stabilizes the NiSi structure. Therefore, the thermal stability of NiSi with Co addition can be achieved by the structure stabilization of NiSi by Co substitution into Ni site of NiSi.

• 한국전기전자재료학회논문지
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• 제24권4호
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• pp.261-265
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• 2011

This paper describes the fabrication and characteristics of a Au/Ni/Ti/3C-SiC Schottky diode with field plate (FP) edge termination. The Schottky contacts were annealed for 30 min at temperatures ranging from 0 to $800^{\circ}C$. At annealing temperature of $600^{\circ}C$, it showed an inhomogeneous Schottky barrier and had the best electrical characteristics. However, the annealing of $800^{\circ}C$ replaced it with ohmic behaviors because of the formation of many different types of nickel silicides. The fabricated Schottky diode had a breakdown voltage of 200 V, Schottky barrier height of 1.19 eV and worked normally even at $200^{\circ}C$.

• 마이크로전자및패키징학회지
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• 제13권4호
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• pp.27-36
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• 2006

약 10%이하의 Pt 또는 Ir 첨가시켜 니켈모노실리싸이드를 고온에서 안정화 시키는 것이 가능한지 확인하기 위해서 활성화영역을 가정한 단결정 실리콘 웨이퍼와 게이트를 상정한 폴리 실리콘 웨이퍼 전면에 Ni, Pt, Ir을 열증착기로 성막하여 10 nm-Ni/l nm-Pt/(poly)Si, 10 nm-Ni/l nm-Ir/(poly)Si 구조를 만들었다. 준비된 시편을 쾌속 열처리기를 이용하여 40초간 실리사이드화 열처리 온도를 $300^{\circ}C{\sim}1200^{\circ}C$ 범위에서 변화시켜 두께 50nm의 실리사이드를 완성하였다. 완성된 Pt와 Ir이 첨가된 니켈실리사이드의 온도별 전기저항변화, 두께변화, 표면조도변화, 상변화, 성분변화를 각각 사점전기저항측정기와 광발산주사전자현미경, 주사탐침현미경, XRD와 Auger depth profiling으로 각각 확인하였다. Pt를 첨가한 결과 기판 종류에 관계없이 기존의 니켈실리사이드 공정에 의한 NiSi와 비교하여 $700^{\circ}C$ 이상의 NiSi 안정화 구역을 넓히는 효과는 없었고 면저항이 커지는 문제가 있었다. Ir을 삽입한 경우는 단결정 실리콘 기판에서는 $500^{\circ}C$ 이상에서의 NiSi와 동일하게 $1200^{\circ}C$까지 안정한 저저항을 보여서 Ir이 효과적으로 Ni(Ir)Si 형태로 $NiSi_{2}$로의 상변태를 적극적으로 억제하는 특성을 보이고 있었고, 다결정 기판에서는 $850^{\circ}C$까지 효과적으로 NiSi의 고온 안정성을 향상시킬 수 있었다.

• 열처리공학회지
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• 제14권1호
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• pp.1-7
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• 2001

A method to simultaneously synthesize and consolidate the silicide $NiSi_2$ and the composite $NiSi_2$-20vol.%Nb from powders of Ni, Si, and Nb was investigated. Combustion synthesis was carried out under the combined effect of an electric field and mechanical pressure. The final density of the products increased nearly linearly with the applied pressure. Highly dense $NiSi_2$ and $NiSi_2$-20vol.%Nb with relative densities of up to 97% were produced under the simultaneous application of a 60MPa pressure and a 3000A current on the reactant powders. The respective Vickers microhardness values for these materials were 6.0 and 5.8 GPa. From indentation crack measurements, the fracture toughness values for $NiSi_2$ and $NiSi_2$-20vol.%Nb were calculated to be 3.3 and 4.7 $MPa{\cdot}m^{1/2}$, respectively.

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2010년도 춘계학술대회 초록집
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• pp.91.2-91.2
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• 2010

The use of plated front contact for metallization of silicon solar cell may alternative technologies as a screen printed and silver paste contact. This technologies should allow the formation of contact with low contact resistivity a high line conductivity and also reduction of shading losses. The better performance of Ni/Cu contacts is attributed to the reduced series resistance due to better contact conductivity of Ni with Si and subsequent electroplating of Cu on Ni. The ability to pattern narrower grid lines for reduced light shading combined with the lower resistance of a metal silicide contact and improved conductivity of plated deposit. This improves the FF as the series resistance is deduced. This is very much required in the case of low concentrator solar cells in which the series resistance is one of the important and dominant parameter that affect the cell performance. A selective emitter structure with highly dopes regions underneath the metal contacts, is widely known to be one of the most promising high-efficiency solution in solar cell processing. This paper using selective emitter structure technique, fabricated Ni/Cu plating metallization cell with a cell efficiency of 17.19%.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제53권10호
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• pp.495-499
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• 2004

Characteristics of ohmic Ni/Si/Ni contacts to n-type 4H-SiC are investigated systematically. The ohmic contacts were formed by annealing Ni/Si/Ni sputtered sequentially The annealings were performed at 950℃ using RTP in vacuum ambient and N₂ ambient, respectively. The specific contact resistivity(p/sub c/), sheet resistance(R/sub s/), contact resistance (R/sub c/) transfer length(L/sub T/) were calculated from resistance(R/sub T/) versus contact spacing(d) measurements obtained from TLM(transmission line method) structure. While the resulting measurement values of sample annealed at vacuum ambient were p/sub c/ = 3.8×10/sup -5/Ω㎠, R/sub c/ = 4.9 Ω and R/sub T/ = 9.8 Ω, those of sample annealed at N₂ ambient were p/sub c/ = 2.29×10/sup -4/Ω㎠, R/sub c/ = 12.9 Ω and R/sub T/ = 25.8 Ω. The physical properties of contacts were examined using XRD 3nd AES. The results showed that nickel silicide was formed on SiC and Ni was migrated into SiC. This result indicates that Ni/Si/Ni ohmic contact would be useful in high performance electronic devices.

• 한국재료학회지
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• 제16권6호
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• pp.341-345
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• 2006

[ $Ni_2Si$ ] mixed powders were mechanically alloyed by a ball mill and then processed by hot isostatic pressing (HIP) and spark plasma sintering (SPS). In the powder that was mechanically alloyed for 15minutes(MA 15 min), only Ni and Si were observed but in the powder that was mechanically alloyed for 30minutes(MA 30 min), $Ni_2Si$, Ni and Si were mixed together. Some of the MA 15 min powder and MA 30 min powder were processed by HIP under pressure of 150MPa at the temperature of $1000^{\circ}C$ for two hours and some of them were processed by SPS under pressure of 60 MPa at the temperature of $1000^{\circ}C$ for 60 seconds. Both methods completely compounded the powders to $Ni_2Si$. The maximum density of sintered lumps by HIP method was 99.5% and the maximum density of the sintered lump by SPS method was 99.3%. with the hardness of HRc 66 with the hardness of HRc 63. Therefore, the SPS method that can sinter in short time at low cost is considered to be more economical that the HIP method that requires complicated sintering conditions and high cost and the sintering can produce target materials in desired sizes and shapes to be used for thin film.

• 대한금속재료학회지
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• 제48권7호
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• pp.660-666
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• 2010

30 nm thick Ni layers were deposited on a glass substrate by e-beam evaporation. Subsequently, 30 nm or 60 nm ${\alpha}-Si:H$ layers were grown at low temperatures ($<220^{\circ}C$) on the 30 nm Ni/Glass substrate by catalytic CVD (chemical vapor deposition). The sheet resistance, phase, microstructure, depth profile and surface roughness of the $\alpha-Si:H$ layers were examined using a four-point probe, HRXRD (high resolution Xray diffraction), Raman Spectroscopy, FE-SEM (field emission-scanning electron microscopy), TEM (transmission electron microscope) and AES depth profiler. The Ni layers reacted with Si to form NiSi layers with a low sheet resistance of $10{\Omega}/{\Box}$. The crystallinty of the $\alpha-Si:H$ layers on NiSi was up to 60% according to Raman spectroscopy. These results show that both nano-scale NiSi layers and crystalline Si layers can be formed simultaneously on a Ni deposited glass substrate using the proposed low temperature catalytic CVD process.

• 대한금속재료학회지
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• 제49권11호
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• pp.905-909
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• 2011

The formation of front metal contact silicon solar cells is required for low cost, low contact resistance to silicon surfaces. One of the available front metal contacts is Ni/Cu plating, which can be mass produced via asimple and inexpensive process. A selective emitter, meanwhile, involves two different doping levels, with higher doping (${\leq}30{\Omega}/sq$) underneath the grid to achieve good ohmic contact and low doping between the grid in order to minimize the heavy doping effect in the emitter. This study describes the formation of a selective emitter and a nickel silicide seed layer for the front metallization of silicon cells. The contacts were thickened by a plated Ni/Cu two-step metallization process on front contacts. The experimental results showed that the Ni layer via SEM (Scanning Electron Microscopy) and EDX (Energy dispersive X-ray spectroscopy) analyses. Finally, a plated Ni/Cu contact solar cell displayed efficiency of 18.10% on a $2{\times}2cm^2$, Cz wafer.