• 한국전기전자재료학회논문지
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• 제18권2호
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• pp.169-173
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• 2005

Ni oxide thin films were formed through annealing treatment in the atmosphere after Ni thin films deposited by a r.f. magnetron sputtering method and then electric and material properties were analyzed for application to thermal sensors. Resistivity of Ni thin films decreased after annealing treatment at 30$0^{\circ}C$ and 40$0^{\circ}C$ for five hours due to crystallization of Ni thin films but the value increased over 45$0^{\circ}C$ because of Ni thin film's oxidation. Resistivity values of Ni thin films were in the range of 10.5 $\mu$Ωcm/$^{\circ}C$ to 2.84${\times}$10$^4$$\mu$Ωcm/$^{\circ}C$ according to the degree of Ni oxidation. Also temperature coefficient of resistance(TCR) values of Ni oxide thin films depended on the degree of Ni oxidation such as 2,188 ppm/$^{\circ}C$ to 5,630 ppm/$^{\circ}C$ in the temperature range of 0 $^{\circ}C$∼150 $^{\circ}C$. The results demonstrate that Ni oxide thin films of annealing treatment at 40$0^{\circ}C$ for 5hours could be more advantageous than pure Ni thin films and Pt thin films from a point of output properties and TCR, applied to thermal sensors.

• 한국표면공학회지
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• 제38권2호
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• pp.55-59
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• 2005

ITO/Ni/ITO thin films were deposited on the PET by RF magnetron sputtering. Dependance of the process parameters such as deposition pressure, positions of Ni layer, on the transmittance, reflectance and sheet resistance of ITO/Ni/ITO film were investigated. When the Ni layer is placed at the center of ITO and deposition pressure is low, ITO/Ni/ITO films showed better optical and electrical properties. At these conditions, the transmittance, reflectance and sheet resistance of the ITO film were $90\%,\;0.38\%$ and $185\Omega/\Box$ respectively.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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• pp.395-395
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• 2007

We report on the fabrication of soluble pentacene-based thin-film transistors (TFTs) that consist of $NiO_x$, poly-vinyl phenol (PVP), and Ni for the source-drain (SID) electrodes, gate dielectric, and gate electrode, respectively. The $NiO_x$ SID electrodes of which the work function is well matched to that of soluble pentacene are deposited on a soluble pentacenechannel by sputter deposited of NiO powder and show a moderately low but still effective transmittance of ~65% in the visible range along with a good sheet resistance of ${\sim}40{\Omega}/{\square}$. The maximum saturation current of our soluble pentacene-based TFT is about $15{\mu}A$ at a gate bias of -40showing a high field effect mobility of $0.06cm^2/Vs$ in the dark, and the on/off current ratio of our TFT is about $10^4$. It is concluded that jointly adopting $NiO_x$ for the S/D electrodes and PVP for gate dielectric realizes a high-quality soluble pentacene-based TFT.

• 한국전기전자재료학회논문지
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• 제21권1호
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• pp.57-62
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• 2008

From the progressing results, it was found that thin film using 52 wt% Ni - 38 wt% Cr - 3 wt% Al - 4 wt% Mn - 3 wt% Si target has good characteristics for low TCR (temperature coefficients of resistance) and high resistivity. The optimum sputtering condition was DC 250 W, 5 mtorr, and 50 sccm and the proper annealing condition was $350^{\circ}C$/3.5 hr in air atmosphere. At these fabricated conditions, thin film resistors with TCR values of less than ${\pm}10ppm/^{\circ}C$ were obtained. The TCR of the packaged-samples made at proper fabrication conditions was $-3{\sim}15ppm/^{\circ}C$ after the thermal cycling and $-20{\sim}180ppm/^{\circ}C$ after PCT (pressure cooker test), we could confirm reliability for the thin film resistor and find the need for enduring research about packaging method.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.985-988
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• 2008

Metal induced crystallization of a-Si with a source of Ni/Si oxide was studied. Its mechanism to induce crystallization was discussed. It was found that new source behaves an effect of self-released nickel and reducing nickel residua, so can provide a wider process tolerance; improve the uniformity and stability of TFTs.

• ETRI Journal
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• 제25권4호
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• pp.270-273
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• 2003

This paper presents a simple process to integrate thin-film inductors with a bottom NiFe magnetic core. NiFe thin films with a thickness of 2 to 3${\mu}m$ were deposited by sputtering. A polyimide buffer layer and shadow mask were used to relax the stress of the NiFe films. The fabricated double spiral thin-film inductor showed an inductance of 0.49${\mu}H$ and a Q factor of 4.8 at 8 MHz. The DC-DC converter with the monolithically integrated thin-film inductor showed comparable performances to those with sandwiched magnetic layers. We simplified the integration process by eliminating the planarization process for the top magnetic core. The efficiency of the DC-DC converter with the monolithic thin-film inductor was 72% when the input voltage and output voltage were 3.5 V and 6 V, respectively, at an operating frequency of 8 MHz.

• 대한화학회지
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• 제56권4호
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• pp.448-458
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• 2012

In order to develop alloy resistance in aggressive sulphat ion, the corrosion behavior of metallic glasses $Ni_{92{\cdot}3}Si_{4.5}B_{32}$, $Ni_{82,3}Cr_7Fe_3Si_{4.5}B_{3.2}$ and $Ni_{75.5}Cr_{13}Fe_{4.2}Si_{4.5}B_{2.8}$ (at %) at different concentrations of $H_2SO_4$ solutions was examined by electrochemical methods and Scanning Electron Microscope (SEM) and X-ray Photoelectron Microscopy (XPS) analyses. The corrosion kinetics and passivation behavior was studied. A direct proportion was observed between the corrosion rate and acid concentration in the case of $Ni_{92{\cdot}3}Si_{4.5}B_{32}$ and $Ni_{75.5}Cr_{13}Fe_{4.2}Si_{4.5}B_{2.8}$ alloys. Critical concentration was observed in the case of $Ni_{82,3}Cr_7Fe_3Si_{4.5}B_{3.2}$ alloy. The influence of the alloying element is reflected in the increasing resistance of the protective film. XPS analysis confirms that the protection film on the $Ni_{92{\cdot}3}Si_{4.5}B_{32}$ alloy was NiS which is less protective than that formed on Cr containing alloys. The corrosion rate of $Ni_{82,3}Cr_7Fe_3Si_{4.5}B_{3.2}$ and $Ni_{75.5}Cr_{13}Fe_{4.2}Si_{4.5}B_{2.8}$. alloys containing 7% and 13% Cr are $7.90-26.1{\times}10^{-3}$ mm/y which is lower about 43-54 times of the alloy $Ni_{92{\cdot}3}Si_{4.5}B_{32}$ (free of Cr). The high resistance of $Ni_{75.5}Cr_{13}Fe_{4.2}Si_{4.5}B_{2.8}$ alloy at the very aggressive media may due to thicker passive film of $Cr_2O_3$ which hydrated to hydrated chromium oxyhydroxide.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2003년도 기술심포지움 논문집
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• pp.84-87
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• 2003

Since Pb-free solder alloys have been used extensively in microelectronic packaging industry, the interaction between UBM (Under Bump Metallurgy) and solder is a critical issue because IMC (Intermetallic Compound) at the interface is critical for the adhesion of mechanical and the electrical contact for flip chip bonding. IMC growth must be fast during the reflow process to form stable IMC. Too fast IMC growth, however, is undesirable because it causes the dewetting of UBM and the unstable mechanical stability of thick IMC. UP to now. Ni and Cu are the most popular UBMs because electroplating is lower cost process than thin film deposition in vacuum for Al/Ni(V)/Cu or phased Cr-Cu. The consumption rate and the growth rate of IMC on Ni are lower than those of Cu. In contrast, the wetting of solder bumps on Cu is better than Ni. In addition, the residual stress of Cu is lower than that of Ni. Therefore, the alloy of Cu and Ni could be used as optimum UBM with both advantages of Ni and Cu. In this paper, the interfacial reactions of Sn-3.5Ag-0.7Cu solder on Ni-xCu alloy UBMs were investigated. The UBMs of Ni-Cu alloy were made on Si wafer. Thin Cr film and Cu film were used as adhesion layer and electroplating seed layer, respectively. And then, the solderable layer, Ni-Cu alloy, was deposited on the seed layer by electroplating. The UBM consumption rate and intermetallic growth on Ni-Cu alloy were studied as a function of time and Cu contents. And the IMCs between solder and UBM were analyzed with SEM, EDS, and TEM.

• Progress in Superconductivity
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• 제8권1호
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• pp.27-32
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• 2006

[$YBa_2Cu_3O_{7-x}$] thin films were deposited on various buffered-templates by a metal organic chemical vapor deposition(MOCVD). Three different templates of $CeO_2/YSZ/CeO_2/pure-Ni(CYC),\;CeO_2/YSZ/Y_2O_3/Ni-3at.%W(YYC)$ and $CeO_2/IBAD-YSZ$/stainless steel were used. The Ni and Ni-W alloy tapes were biaxially textured by cold rolling and annealing heat treatment. The dense YBCO films were grown on both the IBAD and YYC templates with no microcrack, while the YBCO films on the CYC templates were grown with the formation of microcracks and NiO. The YBCO film on the YYC template showed the higher $I_c$ than that on CYC template. Especially, the IBAD templates with a thin $CeO_2$(type I) and thick $CeO_2$(type II) top layer were used to compare the deposition nature of the YBCO on them. Comparing the current property of the YBCO films on IBAD templates, the YBCO film deposited on thick $CeO_2$ layer was better than the film on thin $CeO_2$ layer.

• KIEE International Transactions on Electrophysics and Applications
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• 제4C권3호
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• pp.111-116
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• 2004

The Ni/SiC Schottky diode was fabricated with the $\alpha$-SiC thin film grown by the ICP-CVD method on a (111) Si wafer. $\alpha$-SiC film has been grown on a carbonized Si layer in which the Si surface was chemically converted to a very thin SiC layer achieved using an ICP-CVD method at $700^{\circ}C$. To reduce defects between the Si and $\alpha$-SiC, the surface of the Si wafer was slightly carbonized. The film characteristics of $\alpha$-SiC were investigated by employing TEM (Transmission Electron Microscopy) and FT-IR (Fourier Transform Infrared Spectroscopy). Sputterd Ni thin film was used as the anode metal. The boundary status of the Ni/SiC contact was investigated by AES (Auger Electron Spectroscopy) as a function of the annealing temperature. It is shown that the ohmic contact could be acquired beyond a 100$0^{\circ}C$ annealing temperature. The forward voltage drop at 100A/cm was I.0V. The breakdown voltage of the Ni/$\alpha$-SiC Schottky diode was 545 V, which is five times larger than the ideal breakdown voltage of the silicon device. As well, the dependence of barrier height on temperature was observed. The barrier height from C- V characteristics was higher than those from I-V.