• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.7 no.5
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• pp.43-50
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• 1993

본 논문에서는 인버어터의 출력 파형에 포함되는 고조파를 제거하기 위하여, 디지틀 소프트웨어에 의한 NPC(Neutral Point Clamped) PWM 인버어터 제어기법을 제시하였다. 제안한 기법은 고조파 전류율과 파형 왜율을 낮출 수 있고, 인버어터의 성능을 크게 개선할 수 있다. 주파수 비를 36으로 하고, 변조지수를 1.2∼2.0의 범위에서 제어하였을 때, 대부분의 고조파 성분을 제거할 수 있고 기본파 성분의 크기를 최대로 출력할 수 있다.

• Journal of Power Electronics
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• v.18 no.3
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• pp.702-713
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• 2018

Power loss reduction and total harmonic distortion(THD) minimization are two important goals of improving three-level inverters. In this paper, an optimized pulse width modulation (PWM) strategy that can reduce switching losses and balance the neutral point with an optional THD of three-level neutral-point-clamped inverters is proposed. An analysis of the two-level discontinuous PWM (DPWM) strategy indicates that the optimal goal of the proposed PWM strategy is to reduce switching losses to a minimum without increasing the THD compared to that of traditional SVPWMs. Thus, the analysis of the two-level DPWM strategy is introduced. Through the rational allocation of the zero vector, only two-phase switching devices are active in each sector, and their switching losses can be reduced by one-third compared with those of traditional PWM strategies. A detailed analysis of the impact of small vectors, which correspond to different zero vectors, on the neutral-point potential is conducted, and a hysteresis control method is proposed to balance the neutral point. This method is simple, does not judge the direction of midpoint currents, and can adjust the switching times of devices and the fluctuation of the neutral-point potential by changing the hysteresis loop width. Simulation and experimental results prove the effectiveness and feasibility of the proposed strategy.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.315-316
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• 2015

본 논문에서는 3-레벨 Neutral-Point-Clamped (NPC) 인버터의 DC-Link 중성점 전압 리플을 저감하여 인버터 출력 전압의 품질 신뢰성 향상이 가능한 새로운 Discontinuous Pulse Width Modulation (DPWM) 기법을 제안한다. NPC 인버터에서는 두 개의 커패시터로 이루어진 DC-Link 구조로 인해 상, 하단 DC-Link 커패시터 전압 불평형인 상황에서 DC-Link 중 성점 전압 리플이 발생한다. 중성점 전압 리플 발생 시 출력 전압의 품질을 보장할 수 없으며, 민감한 부하에 손상을 입힐 수 있다. 제안한 DPWM 알고리즘은 DC-Link 커패시터 전압을 조정하는 두 개의 오프셋을 사용하여 중성점 전압 리플을 저감한다. 또한, 시뮬레이션을 통해 본 논문에서 제안한 알고리즘의 타당성을 검증한다.

• Journal of Electrical Engineering and Technology
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• v.2 no.4
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• pp.505-512
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• 2007

The object of this paper is to study a new control structure for sensorless induction machines dedicated to electrical drives using a three-level voltage source inverter VSI-NPC. The amplitude and the rotating speed of the flux vector can be controlled freely. The scheme investigated is an Enhanced direct torque control "EDTC" for electric vehicle propulsion. The considered application imposes some constraints which are achieved in EDTC control (fast torque response, optimal switching logic, torque control at zero speed, and large speed control. The results obtained for an induction motor indicate superior performance over the FOC type without need for any mechanical sensor.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.2
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• pp.173-183
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• 2014

In this paper, an analysis of power losses for the three-level T-type and neutral-point clamped (NPC) PWM inverters is presented, in which the conduction and switching losses of semiconductor devices of the inverters are taken into account. In the inverter operation, the conduction loss depends on the modulation index (MI) and power factor (PF), whereas the switching loss depends on the switching frequency. Power losses for the T-type and NPC inverters are analyzed and calculated at the different operating points of MI, PF and the switching frequency, in which the four different models of semiconductor devices are adopted. In the case of lower MI, the NPC-type is more efficient than the T-type, and vice versa. The validity of the power loss analysis has been verified by the simulation results.

• Proceedings of the KIPE Conference
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• 2012.11a
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• pp.7-8
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• 2012

본 논문에서는 3레벨 NPC(Neutral Point Clamped)와 Active NPC 인버터의 스위치 손실 분배 기법에 따른 출력전력 분석을 하였다. 기존 3레벨 NPC 인버터의 경우 특정 불균형한 스위치 발열 때문에 전력밀도를 높이 설계할 수 없다. 따라서 본 논문에서는 ANPC inverter의 손실 분배기법을 적용하여 시뮬레이션으로 검증하였다.

• Proceedings of the KIPE Conference
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• 2016.07a
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• pp.103-104
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• 2016

기존 Cascade H-bridge 인버터 토폴로지는 커패시터나 다이오드가 없이 스위치로 구성되어 있으며, 필터 없이 정현파와 유사하게 구현할 수 있다. 또한 출력전압 레벨이 높을수록 정현파와 유사하게 되어 고주파가 줄어들며, 각 셀을 직렬로 연결하면 입력전압보다 높은 출력전압 갖는다. 본 논문에서는 기존 Cascade H-bridge 인버터와 NPC(Neutral Point Clamped)가 결합한 Cascade H-bridge NPC 인버터를 제안하였다. Cascade H-bridge NPC 인버터는 기존 Cascade H-bridge 인버터 특성과 유사하며, Cascade H-bridge 인버터와 NPC 인버터의 장점을 가지고 있다. Cascade H-bridge 인버터와 Cascade H-bridge NPC 인버터를 시뮬레이션 통해 THD(Total Harmonic Distortion) 비교분석하였고 시뮬레이션은 PSIM 9.1.4을 가지고 검증하였다.

• Journal of Power Electronics
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• v.16 no.4
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• pp.1415-1425
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• 2016

This paper presents a new approach for fault diagnosis in three-level neutral point clamped inverters. The proposed method is based on the average values of the positive and negative parts of normalized output currents. This method is capable of detecting and locating multiple open-circuit faults in the controlled power switches of converters in half of a fundamental period of those currents. The implementation of this diagnostic approach only requires two output currents of the inverter. Therefore, no additional sensors are needed other than the ones already used by the control system of a drive based on this type of converter. Moreover, through the normalization of currents, the diagnosis is independent of the load level of the converter. The performance and effectiveness of the proposed diagnostic technique are validated by experimental results obtained under steady-state and transient conditions.

• Journal of Electrical Engineering and Technology
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• v.9 no.6
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• pp.2168-2180
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• 2014

In this paper, a generalized power loss algorithm for multilevel neutral-point clamped (NPC) PWM inverters is presented, which is applicable to any level number of multilevel inverters. In the case of three-level inverters, the conduction loss depends on the MI (modulation index) and the PF (power factor), and the switching loss depends on a switching frequency, turn-on and turn-off energy. However, in the higher level of inverters than the three-level, the loss of semiconductor devices cannot be analyzed by conventional methods. The modulation depth should be considered in addition, to find the different conducting devices depending on the MI. In a case study, the power loss analysis for the three- and five-level NPC inverters has been performed with the proposed algorithm. The validity of the proposed algorithm is verified by simulation for the three-and five-level NPC inverters and experiment for three-level NPC inverter.

• Proceedings of the KIPE Conference
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• 2014.11a
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• pp.143-144
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• 2014

본 논문에서는 NPC(Neutral Point Clamped) 및 T-type IGBT 모듈을 이용하여 3상 3-레벨 인버터를 구성하고, 인버터에서 발생되어지는 도통손실과 스위칭 손실을 PSIM의 Thermal Module을 사용하여 확인한다. 또한 토폴로지 상의 차이에 의해 발생되어지는 스위치 손실을 비교 하며, 시뮬레이션에 적용한 파라미터 값들을 수식에 직접 적용하여 손실에 영향을 미치는 파라미터를 확인하고, 각 파라미터의 값의 변화가 주어진 조건에서 전체 손실에 미치는 영향을 확인한다.