• Proceedings of the KIPE Conference
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• 2012.11a
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• pp.7-8
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• 2012

본 논문에서는 3레벨 NPC(Neutral Point Clamped)와 Active NPC 인버터의 스위치 손실 분배 기법에 따른 출력전력 분석을 하였다. 기존 3레벨 NPC 인버터의 경우 특정 불균형한 스위치 발열 때문에 전력밀도를 높이 설계할 수 없다. 따라서 본 논문에서는 ANPC inverter의 손실 분배기법을 적용하여 시뮬레이션으로 검증하였다.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.4
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• pp.291-296
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• 2022

Capacitor is one of the reliability-critical components in power converters. The lifetime of the capacitor decreases as the operating temperature increases, and power losses caused by capacitor current are the main cause of the capacitor temperature increase. Therefore, various studies are being conducted to improve the lifetime of the capacitor by reducing the current of DC-link capacitors. In this study, pulse width modulation methods proposed for improving the lifetime of DC-link capacitors of the three-level NPC inverter are comparatively analyzed. The lifetime evaluation of the DC-link capacitor under different modulation methods is performed at component level first and then system level by considering all capacitors by applying Monte Carlo simulation. Furthermore, their effects on the efficiency and THD of the output current are also considered.

• Journal of Electrical Engineering and Technology
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• v.10 no.3
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• pp.1066-1074
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• 2015

This paper presents the reverse recovery characteristic according to the change of switching states when Si diode and SiC diode are used as clamp diode and proposes a method to minimize the switching loss containing the reverse recovery loss in the neutral-point-clamped inverter at low modulation index. The previous papers introduce many multiple circuits replacing Si diode with SiC diode to reduce the switching loss. In the neutral-point-clamped inverter, the switching loss can be also reduced by replacing device in the clamp diode. However, the switching loss in IGBT is large and the reduced switching loss cannot be still neglected. It is expected that the reverse recovery effect can be infrequent and the switching loss can be considerably reduced by the proposed method. Therefore, it is also possible to operate the inverter at the higher frequency with the better system efficiency and reduce the volume, weight and cost of filters and heatsink. The effectiveness of the proposed method is verified by numerical analysis and experiment results.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.45-46
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• 2013

멀티레벨 고압인버터 토폴로지 중 저압 Power Cell를 이용하여 고압을 출력하는 Cascaded 방식이 산업계에서는 널리 사용되고 이다. 최근 제품화된 Cascaded 방식은 크게 두 가지 형태로 구분할 수 있다. 저압 Power Cell에 단상 H-Bridge를 이용한 Cascaded H-Bridge 멀티레벨 인버터와 단상 NPC(Neutral Point Clamped) 토폴로지를 적용한 Cascaded NPC 멀티레벨 인버터이다. 이 중 Cascaded NPC 멀티레벨 인버터의 경우 적은 수의 셀을 사용하여 CHB와 동일한 출력 레벨을 생성할 수 있으며, NPC 방식의 고압 인버터 고유의 장점을 모두 구현할 수 있다. 반대로 CHB Type과 NPC type의 단점인 복잡한 구조의 Phase Shift Transformer와 DC_Link 중성점 전압이 변동하는 단점 또한 나타나게 된다. 본 논문에서는 Cascaded NPC 멀티레벨 인버터의 이러한 단점을 극복하기 위한 새로운 방식의 Phase Shift Transformer와 NPC Power Cell의 중성점 전압 변동을 줄일 수 있는 기법에 대해 설명하고 이 기법에 대한 타당성을 모의시험을 통해 검증하였다.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.66 no.5
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• pp.778-785
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• 2017

This paper presents a control method for reducing the distortion of the grid current at a grid-connected three-level neutral point clamped (NPC) inverter. The grid current is distorted from the 5th and 7th harmonic components in the stationary frame current also the 6th harmonic component in the synchronous frame current. In this paper, the 6th harmonic component on synchronous frame is controlled by using all-pass filters (APFs) and proportional integral (PI) controllers for distortion of the grid side. When transformed the 6th harmonic component is controlled, the 5th and 7th harmonic components are reduced. The validity of the proposed control method is verified by simulation and experiment results using a 25kW three-level NPC inverter.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.4
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• pp.376-382
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• 2014

This paper proposes the pulse width modulation (PWM) control strategy for low-speed operation in the three-level neutral-point-clamped (NPC) inverters based on the bootstrap gate drive circuit. As a purpose of the cost reduction, several papers have paid attention to the bootstrap circuit applied to the three-level NPC inverter. However, the bootstrap gate driver IC cannot generate the gate signal to the IGBT for low-speed operation, because the bootstrap capacitor voltage decreases under the threshold level. For low-speed operation, the dipolar and partial-dipolar modulations can be the effective solution. However, these modulations have drawbacks in terms of the switching loss and THD. Therefore, this paper proposes the PWM control strategy to operate the inverter at low-speed and to minimize the switching loss and harmonics. The experimental results are presented to verify the validity on the proposed method.

• Journal of Power Electronics
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• v.17 no.4
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• pp.923-932
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• 2017

This paper proposes a novel scheme which can compensate the common-mode voltage (CMV) for five-level active neutralpoint clamped (5L-ANPC) inverters, which is based on modifying the space vector pulse width modulation (SVPWM) and adding an auxiliary leg to the inverter. For the modified SVPWM, only the 55 voltage vectors producing low CMV values among the 125 possible voltage vectors are utilized, which varies over the three voltage levels of $-V_{dc}/12$, 0 V, and $V_{dc}/12$. In addition, the compensating voltage, which is injected into the 5L-ANPC inverter system to cancel the remaining CVM through a common-mode transformer (CMT) is generated by the additional NPC leg. By the proposed method, the CMV of the inverter is fully eliminated, while the utilization of the DC-link voltage is not decreased at all. Furthermore, all of the DC-link and flying capacitor voltages of the inverter are well controlled. Simulation and experimental results have verified the validity of the proposed scheme.

• Proceedings of the KIPE Conference
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• 2014.11a
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• pp.143-144
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• 2014

본 논문에서는 NPC(Neutral Point Clamped) 및 T-type IGBT 모듈을 이용하여 3상 3-레벨 인버터를 구성하고, 인버터에서 발생되어지는 도통손실과 스위칭 손실을 PSIM의 Thermal Module을 사용하여 확인한다. 또한 토폴로지 상의 차이에 의해 발생되어지는 스위치 손실을 비교 하며, 시뮬레이션에 적용한 파라미터 값들을 수식에 직접 적용하여 손실에 영향을 미치는 파라미터를 확인하고, 각 파라미터의 값의 변화가 주어진 조건에서 전체 손실에 미치는 영향을 확인한다.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.900-901
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• 2008

본 논문은 NPC 인버터(Neutral-point-clamped Inverter) 시스템을 구성하는 스위칭 소자에 개방성 고장이 발생하였을 경우 인버터 시스템의 고장 검출을 위한 새로운 고장 검출 방법을 제안하였다. 이 방법은 CPWM(continuous-PWM) 고유의 특성을 이용하기 때문에 간단한 알고리즘으로서 구현이 용이할 뿐만 아니라 기존의 방법보다 빠른 고장 검출 능력을 가진다. 빠른 고장 검출 능력은 고장 검출 시간의 지연에서 올 수 있는 직류-링크 커패시터의 전압 불평형 문제 및 이로 인한 다른 스위치로의 전압 스트레스 증가에 의한 소자 파괴와 같은 악영향을 개선시킬 수 있다. 제안된 방법의 타당성을 입증하기 위하여 실험을 수행하였다.

• Proceedings of the KIPE Conference
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• 2013.07a
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• pp.421-422
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• 2013

본 논문에서는 3-레벨의 NPC(Neutral Point Clamped) VSC와 T-type VSC를 시뮬레이션용 열 모델링 기법을 이용하여 스위칭과 도통 손실을 비교 분석하였다. 두 가지 토폴로지의 인버터동작과 회생동작에서의 주파수에 따른 효율을 시뮬레이션을 통하여 고찰 하였다.