• Proceedings of the KIPE Conference
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• 2003.11a
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• pp.11-16
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• 2003

The 3-level converter/inverter system is very efficient in the ac motor drives of high voltage and high power application. This paper proposed a simple method to diagnose faults using change of current vector pattern in space vector diagram when the faults occurrence in the 3-level inverter and a control method that can protect system from unbalance of the neutral point voltage according to faults. The validity of the proposed method is demonstrated by the simulation results.

• Proceedings of the KIPE Conference
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• 2003.07b
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• pp.560-564
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• 2003

This paper proposes a simple control strategy based on the discontinuous PWM(DPWM) to balance the DC-link voltage of three-level Neutral-Point-Clamped(WPC) inverters at low modulation index. New DPWM methods in multi-level inverter are also introduced. The proposed DPWM method changes the path and duration to flow the neutral point current out of or into neutral point of the DC-link and it makes the overall fluctuation of the DC-link voltage zero during a sampling time of reference voltage vector. Therefore, the voltage of the DC-link can be balanced fairly well and also the voltage ripple of the DC-link is reduced significantly. Moreover, comparing with conventional methods, the proposed strategy is very simple. The validity of the proposed DPWM method is verified by experiment

• Journal of Power Electronics
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• v.16 no.6
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• pp.2109-2118
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• 2016

Based on the space vector pulse width modulation (SVPWM) theory, this paper realizes an easier SVPWM strategy, which is equivalently implemented by CBSPWM with zero-sequence voltage injection. The traditional SVPWM strategy has no effect on controlling the neutral-point voltage balance. In order to solve the neutral-point voltage unbalance problem for neutral-point-clamped (NPC) three-level inverters, this paper proposes a neutral-point voltage balance controller. The proposed controller realizes controlling the neutral-point voltage balance by dynamically calculating the offset superimposed to the three-phase modulation waves of an equivalent SVPWM strategy. Compared with the traditional SVPWM strategy, the proposed neutral-point voltage balance controller has a strong ability to balance the neutral-point voltage, has good steady-state performance, improves the output waveforms quality and is easy for digital implementation. An experiment has been carried out on a NPC three-level inverter prototype based on a digital signal processor-complex programmable logic device (DSP-CPLD). The obtained experimental results verify the effectiveness of the proposed neutral-point voltage balance controller.

• Proceedings of the KIPE Conference
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• 2011.11a
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• pp.3-4
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• 2011

This paper presents a survey of floating power supply based on bootstrap operation for three-level voltage-source inverters. The floating power supply for upper switches is achieved by the bootstrap capacitor charged during on-time of the switch underneath. Hence, a large number of bulky isolated DC/DC power supplies for each gate driver are reduced. The Pspice simulation results show the behavior of bootstrap devices and the performance of bootstrap capacitor voltage.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.4
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• pp.369-372
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• 2017

This paper presents a control scheme for three-level NPC inverters using small DC-link capacitors. To reduce the inverter system volume, the film capacitor with small capacitance is a promising candidate for the DC-link. When small capacitors are applied in a three level inverter, however, the AC ripple component increases in the DC-link NPV (neutral point voltage). In addition, the three-phase input grid currents are distorted when the DC-link capacitors are fed by diode rectifier. In this paper, the additional circuit is applied to compensate for small capacitor systems defect, and the offset voltage injection method is presented for the stabilization in NPV. These two proposed processes evidently ensure the quality improvement of the input grid currents and output load currents. The feasibility of the proposed method is verified by experimental results.

• Journal of Electrical Engineering and Technology
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• v.10 no.3
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• pp.1066-1074
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• 2015

This paper presents the reverse recovery characteristic according to the change of switching states when Si diode and SiC diode are used as clamp diode and proposes a method to minimize the switching loss containing the reverse recovery loss in the neutral-point-clamped inverter at low modulation index. The previous papers introduce many multiple circuits replacing Si diode with SiC diode to reduce the switching loss. In the neutral-point-clamped inverter, the switching loss can be also reduced by replacing device in the clamp diode. However, the switching loss in IGBT is large and the reduced switching loss cannot be still neglected. It is expected that the reverse recovery effect can be infrequent and the switching loss can be considerably reduced by the proposed method. Therefore, it is also possible to operate the inverter at the higher frequency with the better system efficiency and reduce the volume, weight and cost of filters and heatsink. The effectiveness of the proposed method is verified by numerical analysis and experiment results.

• Journal of Power Electronics
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• v.12 no.2
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• pp.285-293
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• 2012

Multilevel inverters have gained attention in high-power applications due to their numerous advantages in comparison with conventional two-level inverters. In this paper a simplified Space-Vector Modulation (SVM) algorithm for a three-level Neutral-Point Clamped (NPC) inverter is implemented on a Freescale$^{(R)}$ DSP56F8037. The algorithm is based on a simplification of the space-vector diagram for a three-level inverter so that it can be used with a two-level inverter. Once the simplification has been achieved, calculation of the dwell times and the switching sequences are carried out in the same way as for the two-level SVM method. Details of the hardware design are included. Experimental results are analyzed to validate the performance of the simplified algorithm.

• Journal of Power Electronics
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• v.18 no.1
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• pp.70-80
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• 2018

A novel strategy based on a zero common mode voltage pulse-width modulation (ZCMV-PWM) technique and zero-sequence circulating current (ZSCC) feedback control is proposed in this study to eliminate ZSCCs between three-level neutral point clamped (NPC) voltage source inverters, with common AC and DC buses, that are operating in parallel. First, an equivalent model of ZSCC in a three-phase three-level NPC inverter paralleled system is developed. Second, on the basis of the analysis of the excitation source of ZSCCs, i.e., the difference in common mode voltages (CMVs) between paralleled inverters, the ZCMV-PWM method is presented to reduce CMVs, and a simple electric circuit is adopted to control ZSCCs and neutral point potential. Finally, simulation and experiment are conducted to illustrate effectiveness of the proposed strategy. Results show that ZSCCs between paralleled inverters can be eliminated effectively under steady and dynamic states. Moreover, the proposed strategy exhibits the advantage of not requiring carrier synchronization. It can be utilized in inverters with different types of filter.

• Journal of Power Electronics
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• v.17 no.2
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• pp.368-379
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• 2017

In this paper, a direct torque control algorithm with novel duty cycle-based modulation is proposed for permanent magnet synchronous motor drives fed by neutral-point clamped three-level inverters. Compared with the standard DTC, the proposed algorithm can suppress steady-state torque ripples as well as ensure neutral-point potential balance and smooth vector switching. A unified torque/flux evaluation table with multiple voltage vectors and precise control levels is established and used in this method. This table can be used to evaluate the effects of duty-cycle vectors on torque and flux directly, and the elements of the table are independent of the motor parameters. Consequently, a high number of appropriate voltage vectors and their corresponding duty cycles can be selected as candidate vectors to reduce torque ripples by looking up the table. Furthermore, small vectors are incorporated into the table to ensure the neutral-point potential balance with the numerous candidate vectors. The feasibility and effectiveness of the proposed algorithm are verified by both simulations and experiments.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1233-1242
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• 2014

A new inverter topology for single-phase photovoltaic (PV) systems is proposed in this study. The proposed inverter offers a four-level voltage in its output terminals. This feature results in easier filtering in comparison with other conventional two-level or three-level inverters. In addition, the proposed four-level inverter (PFLI) has a transformer-less topology, which decreases the size, weight, and cost of the entire system and increases the overall efficiency of the system. Although the inverter is transformer-less, it produces a negligible leakage ground current (LGC), which makes this inverter suitable for PV grid-connected applications. The performance of the proposed inverter is compared with that of a four-level neutral point clamped inverter (FLNPCI). Theoretical analysis and computer simulations verify that the PFLI topology is superior to FLNPCI in terms of efficiency and suitability for use in PV transformer-less systems.