• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.12
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• pp.804-810
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• 2004

There are two important things for the general purpose neural network processor. The first is a capability to build various structures of neural network, and the second is to be able to support suitable learning method for that neural network. Some way to process various learning algorithms is required for on-chip learning, because the more neural network types are to be handled, the more learning methods need to be built into. In this paper, an improved hardware structure is proposed to compute various kinds of learning algorithms flexibly. The hardware structure is based on the existing modular neural network structure. It doesn't need to add a new circuit or a new program for the learning process. It is shown that rearrangements of the existing processing elements can produce several neural network learning modules. The performance and utilization of this module are analyzed by comparing with other neural network chips.

• ETRI Journal
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• v.42 no.4
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• pp.468-479
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• 2020

The proposed AI processor architecture has high throughput for accelerating the neural network and reduces the external memory bandwidth required for processing the neural network. For achieving high throughput, the proposed super thread core (STC) includes 128 × 128 nano cores operating at the clock frequency of 1.2 GHz. The function-safe architecture is proposed for a fault-tolerance system such as an electronics system for autonomous cars. The general-purpose processor (GPP) core is integrated with STC for controlling the STC and processing the AI algorithm. It has a self-recovering cache and dynamic lockstep function. The function-safe design has proved the fault performance has ASIL D of ISO26262 standard fault tolerance levels. Therefore, the entire AI processor is fabricated via the 28-nm CMOS process as a prototype chip. Its peak computing performance is 40 TFLOPS at 1.2 GHz with the supply voltage of 1.1 V. The measured energy efficiency is 1.3 TOPS/W. A GPP for control with a function-safe design can have ISO26262 ASIL-D with the single-point fault-tolerance rate of 99.64%.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.368-371
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• 1999

In this paper, we propose a neural network processor architecture with on-chip learning and with reconfigurability according to the data dependencies of the algorithm applied. For the neural network model applied, the proposed architecture can be configured into either SIMD or SRA(Systolic Ring Array) without my changing of on-chip configuration so as to obtain a high throughput. However, changing of system configuration can be controlled by user program. To process activation function, which needs amount of cycles to get its value, we design it by using PWL(Piece-Wise Linear) function approximation method. This unit has only single latency and the processing ability of non-linear function such as sigmoid gaussian function etc. And we verified the processing mechanism with EBP(Error Back-Propagation) model.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2020.11a
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• pp.106-107
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• 2020

본 논문에서는 촬영과 동시에 유통되는 생방송 영상의 실시간 지적재산권 보호를 위한 Convolutional Neural Network를 기반으로 하는 워터마킹 프로세서의 구조를 제안한다. 제안하는 워터마킹 프로세서는 전처리 네트워크와 삽입 네트워크를 최적화하여 ASIC 칩으로 제작한다. 이는 영상을 입력으로 하는 딥 러닝 분야에서 많이 사용되는 CNN을 기반으로 하기 때문에 일반적인 딥 러닝 가속기 설계로 간주된다.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.10
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• pp.2059-2063
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• 2009

This paper presents a programmable System-On-a-chip (SoC) for various embedded smart applications that need Neural Network computations. The system is fully implemented into a prototyping platform based on Field Programmable Gate Array (FPGA). The SoC consists of an embedded processor core and a reconfigurable hardware accelerator for neural computations. The performance of the SoC is evaluated using a real image processing application, an optical character recognition (OCR) system.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2001.12a
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• pp.255-258
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• 2001

This paper is implementation of cellular automata neural network system which is a living creatures' brain using evolving hardware concept. Cellular automata neural network system is based on the development and the evolution, in other words, it is modeled on the ontogeny and phylogeny of natural living things. The proposed system developes each cell's state in neural network by CA. And it regards code of CA rule as individual of genetic algorithm, and evolved by genetic algorithm. In this paper we implement this system using evolving hardware concept Evolving hardware is reconfigurable hardware whose configuration is under the control of an evolutionary algorithm. We design genetic algorithm process for evolutionary algorithm and cells in cellular automata neural network for the construction of reconfigurable system. The effectiveness of the proposed system is verified by applying it to time-series prediction.

• Journal of the Institute of Convergence Signal Processing
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• v.3 no.1
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• pp.54-60
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• 2002

In this paper, we proposed a hybrid neural network-fuzzy controller which compensate a output of neural network controller. Even if learn by neural network controller, it can occur an bad results from disturbance or load variations. So in order to adjust above case, we used the fuzzy compensator to get an expected results. And the weight of main neural network can be changed with the result of loaming a inverse model neural network of Plant, so a expected dynamic characteristics of plant can be got. As the results of simulation through the second order plant, we confirmed that the proposed speed controller get a good response compare with a neural network controller. We implemented the controller using the DSP processor and applied in a hydraulic servo system. And then we observed an experimental results.

• Proceedings of the KIPE Conference
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• 2000.07a
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• pp.620-623
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• 2000

A very simple control approach using neural network for the robust position control of a Permanent Magnet Synchronous Motor(PMSM) is presented The linear quadratic controller plus feedforward neural network is employed to obtain the robust PMSM system approximately linearized using field-orientation method for an AC servo. The neural network is trained in on-line phases and this neural network is composed by a fedforward recall and error back-propagation training. Since the total number of nodes are only eight this system can be easily realized by the general microprocessor. During the normal operation the input-output response is sampled and the weighting value is trained multi-times by error back-propagation method at each sample period to accommodate the possible variations in the parameters or load torque. And the state space analysis is performed to obtain the state feedback gains systematically. IN addition the robustness is also obtained without affecting overall system response. This method is realized by a floating-point Digital Singal Processor DS1102 Board (TMS320C31) The basic DSP software is used to write C program which is compiled by using ANSI-C style function prototypes.

• Proceedings of the KIEE Conference
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• 1999.07b
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• pp.764-767
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• 1999

In this paper, to bring under robust and accurate control of auto-equipment systems which disturbance, parameter alteration of system, uncertainty and so forth exist, neural network controller called dynamic neural processor(DNP) is designed. Also, the architecture and learning algorithm of the proposed dynamic neural network, the DNP, are described and computer simulations are provided to demonstrate the effectiveness of the proposed learning method using the DNP.

• Proceedings of the KIEE Conference
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• 1998.11b
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• pp.533-536
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• 1998

The intent of this paper is to describe a neural network structure called dynamic neural processor(DNP), and examine how it can be used in developing a learning scheme for computing robot inverse kinematic transformations. The architecture and learning algorithm of the proposed dynamic neural network structure, the DNP, are described. Computer simulations are provided to demonstrate the effectiveness of the proposed learning using the DNP.