• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.5
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• pp.407-414
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• 2014

This study proposes a control design for the grid output current and for reducing the neutral-point voltage oscillation through the small-signal modeling of the three-phase grid connected with a three-level neutral-point-clamped (NPC) inverter with LCL filter. The three-level NPC inverter presents an inherent problem: the neutral-point voltage fluctuation caused by the neutral-point current flowing in or out from the neutral point. The small signal modeling consists of averaging, dq0 transformation, perturbing, and linearizing steps performed on a three-phase grid connected to a three-level NPC inverter with LCL filter. The proposed method controls both the grid output and neutral-point currents at every switching period and reduces the neutral-point voltage oscillation. The validity of the proposed method is verified through simulation and experiment.

• Proceedings of the KIPE Conference
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• 2016.07a
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• pp.487-488
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• 2016

In this paper, a new active circuit for common-mode voltage (CMV) cancellation in three-level NPC (neutral-point clamped) inverters is proposed, which can avoid the saturation of the common-mode transformer (CMT). The proposed circuit utilizes an additional three-level leg to produce the compensating CMV of the NPC inverters, which eliminates the CMV of the inverter through the CMT.

• Journal of Electrical Engineering and Technology
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• v.12 no.2
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• pp.738-750
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• 2017

In this paper, carrier-based pulse width modulation (CBPWM), space vector PWM (SVPWM) and reduced switching losses PWM (RSLPWM) for the three-level neutral point clamped (NPC) inverter are introduced. In the case of the neutral point (NP) potential (NPP) offset, an asymmetric disposition PWM (ASPDPWM) strategy is proposed, which can output PWM sequences correctly and suppress the lower order harmonics of the inverter effectively. An NPP balance strategy based on carrier based PWM (CBPWM) is analyzed. A hybrid modulation strategy combining RSLPWM and the NPP balance based on CBPWM is proposed, and hysteresis control is adopted to switch between the two modulation strategies. An experimental prototype of the three-level NPC inverter is built. The effectiveness of the hybrid modulation is verified with a resistance-inductance load and a permanent magnetic synchronous motor (PMSM) load, respectively. The experimental results show that reduced switching losses and an acceptable NPP can be effectively achieved in the hybrid modulation strategy.

• Journal of Electrical Engineering and Technology
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• v.13 no.5
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• pp.1986-1995
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• 2018

In this paper, a novel neutral-point voltage balancing scheme for NPC three-level inverters using carrier-based sinusoidal pulse width modulation (SPWM) method is developed. The new modulation approach, based on the obtained expressions of zero sequence voltage in all six sectors, can significantly suppress the low-frequency voltage oscillation in the neutral point at high modulation index and achieve a fast voltage-balancing dynamic performance. The implementation of the proposed method is very simple. Another attractive feature is that the scheme can stably control any voltage difference between the two dc-link capacitors within a certain range without using any extra hardware. Furthermore, the presented scheme is also applicable to the single-phase NPC three-level inverter. It can maintain the neutral-point voltage balance at full modulation index and improve the voltage-balancing dynamic performance of the single-phase NPC three-level inverter. The performance of the proposed strategy and its benefits over other previous techniques are verified experimentally.

• Journal of Electrical Engineering and Technology
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• v.9 no.2
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• pp.489-500
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• 2014

This paper presents a simple modified unipolar carrier-based pulsewidth modulation (CB-PWM) strategy for the three-level neutral-point-clamped (NPC) voltage source inverter (VSI). Analytical expressions for the relationship between modulation reference signals and output voltages are derived. The proposed modulation technique for the three-level NPC VSI includes the maximum and minimum of the three-phase sinusoidal reference voltages with zero-sequence voltage injection concept. The proposed modified CB-PWM strategy incorporates a novel method that requires only of one triangular carrier wave for generate the gating pulses in three-level NPC VSI. It has the advantages of being simplifying the algorithm with no need of complex two/multi-carrier pulsewidth modulation or space vector modulation (SVM) and it's also simple to implement. The possibility of the proposed CB-PWM technique has been verified though computer simulation and experimental results.

• Journal of Power Electronics
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• v.16 no.4
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• pp.1598-1611
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• 2016

In some special occasions with strict size requirements, such as mine hoists, improving the design accuracy of the forced-air cooling systems of NPC three-level inverters is a key technology for improving the power density and decreasing the volume. First, a fast power-loss calculation method was brought. Its calculation principle introduced in detail, and the computation formulas were deduced. Secondly, the average and dynamic power losses of a 1MW mine hoist acting as the research target were analyzed, and a forced-air cooling system model based on a series of theoretical analyses was designed with the average power loss as a heat source. The simulation analyses proves the accuracy and effectiveness of this cooling system during the unit lifting period. Finally, according to an analysis of the periodic working condition, the maximum power-loss range of a NPC three-level inverter under multi cycle operation was obtained and its dynamic power loss was taken into the optimized cooling system model as a heat source to solve the power device damage caused by instantaneous heat accumulation. The effectiveness and feasibility of the optimization design based on the dynamic power loss calculation of the maximum power-loss range was proved by simulation and experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.13 no.1
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• pp.22-32
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• 2008

This paper proposes a linearization technique for the 3-level NPC type inverter, which increases the linear control range of Inverter up to the one-pulse inverter. The overmodulation range is divided into two modes depending on the Modulation Index, MI. In overmodulation region I, the reference angles are derived from the fourier series expansion of the reference voltage corresponding to the MI. In overmodulation region II, the holding angles are also derived in the same way. Therefore, it is possible to obtain the linear control and the maximized utilization of PWM inverter output voltage.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.6
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• pp.472-480
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• 2009

This paper describes the overmodulative SVPWM technique and harmonics analyses of three phase NPC type three-level inverter to the modulation index. Three phase NPC type three-level inverter adopted SVPWM to extend the linear region to 0.907, moreover, the following voltage compensation using Fourier series was adopted in the region of overmodulation to make it work to six-step level. PD type of multi carrier method is used with the double Fourier series for the analysis of output power harmonics characteristic. Simulation was performed by PSIM, and the harmonics characteristics of 3-level inverter in each region are analyzed. The side band harmonics of carrier frequency are dominant in the linear region, but these harmonic components are decreased as the inveter goes to overmodulation region, and the harmonics due to the fundamental frequency is increased gradually at the same time. The harmonic analyses are verified through the simulation and experimental results under the same condition.

• Journal of Electrical Engineering and Technology
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• v.12 no.3
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• pp.1203-1210
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• 2017

Switched-inductor (SL) Z-source three-level inverter is a novel high power topology. The SL based impedance network can boost the input dc voltage to a higher value than the single LC impedance network. However, as all the neutral-point-clamped (NPC) inverters, the SL Z-source three-level inverter has to balance the neutral-point (NP) potential too. The principle of the inverter is introduced and then the effects of NP potential unbalance are analyzed. A NP balancing method is proposed. Other than the methods for conventional NPC inverter without Z-source impedance network, the upper and lower shoot-through durations are corrected by the feedforward compensation factors. With the proposed method, the NP potential is balanced and the voltage boosting ability of the Z-source network is not affected obviously. Simulations are conducted to verify the proposed method.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.6
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• pp.535-540
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• 2022

DC-link capacitors are reliability-critical components in a photovoltaic (PV) inverter. Typically, the lifetime of a DC-link capacitor is evaluated by considering the voltage and hot-spot temperature of the capacitor under the specific operating condition of the PV inverter. However, the output of the PV inverter is determined by solar irradiation and ambient temperature, which vary with the seasons; accordingly, the hot-spot temperature of the capacitor also changes. Therefore, the mission profile of the PV system should be considered to effectively evaluate the reliability of the DC-link capacitor. In this study, the reliability of the DC-link capacitor of a three-level NPC inverter is comparatively analyzed with and without considering the mission profiles of the PV system, where two mission profiles recorded in Arizona and Iza are considered. The accumulated damage of the DC-link capacitor is calculated based on the lifetime model by analyzing its thermal loading. Afterward, a reliability evaluation of the DC-link capacitor is performed at the component level and then at the system level by considering all capacitors by means of Monte Carlo analysis. Results reveal the importance of performing a mission-profile-based reliability evaluation during the design of high-reliability PV inverters to achieve the target reliability performance.