• 전력전자학회논문지
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• 제19권5호
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• pp.407-414
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• 2014

This study proposes a control design for the grid output current and for reducing the neutral-point voltage oscillation through the small-signal modeling of the three-phase grid connected with a three-level neutral-point-clamped (NPC) inverter with LCL filter. The three-level NPC inverter presents an inherent problem: the neutral-point voltage fluctuation caused by the neutral-point current flowing in or out from the neutral point. The small signal modeling consists of averaging, dq0 transformation, perturbing, and linearizing steps performed on a three-phase grid connected to a three-level NPC inverter with LCL filter. The proposed method controls both the grid output and neutral-point currents at every switching period and reduces the neutral-point voltage oscillation. The validity of the proposed method is verified through simulation and experiment.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2016년도 전력전자학술대회 논문집
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• pp.487-488
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• 2016

In this paper, a new active circuit for common-mode voltage (CMV) cancellation in three-level NPC (neutral-point clamped) inverters is proposed, which can avoid the saturation of the common-mode transformer (CMT). The proposed circuit utilizes an additional three-level leg to produce the compensating CMV of the NPC inverters, which eliminates the CMV of the inverter through the CMT.

• Journal of Electrical Engineering and Technology
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• 제12권2호
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• pp.738-750
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• 2017

In this paper, carrier-based pulse width modulation (CBPWM), space vector PWM (SVPWM) and reduced switching losses PWM (RSLPWM) for the three-level neutral point clamped (NPC) inverter are introduced. In the case of the neutral point (NP) potential (NPP) offset, an asymmetric disposition PWM (ASPDPWM) strategy is proposed, which can output PWM sequences correctly and suppress the lower order harmonics of the inverter effectively. An NPP balance strategy based on carrier based PWM (CBPWM) is analyzed. A hybrid modulation strategy combining RSLPWM and the NPP balance based on CBPWM is proposed, and hysteresis control is adopted to switch between the two modulation strategies. An experimental prototype of the three-level NPC inverter is built. The effectiveness of the hybrid modulation is verified with a resistance-inductance load and a permanent magnetic synchronous motor (PMSM) load, respectively. The experimental results show that reduced switching losses and an acceptable NPP can be effectively achieved in the hybrid modulation strategy.

• Journal of Electrical Engineering and Technology
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• 제13권5호
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• pp.1986-1995
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• 2018

In this paper, a novel neutral-point voltage balancing scheme for NPC three-level inverters using carrier-based sinusoidal pulse width modulation (SPWM) method is developed. The new modulation approach, based on the obtained expressions of zero sequence voltage in all six sectors, can significantly suppress the low-frequency voltage oscillation in the neutral point at high modulation index and achieve a fast voltage-balancing dynamic performance. The implementation of the proposed method is very simple. Another attractive feature is that the scheme can stably control any voltage difference between the two dc-link capacitors within a certain range without using any extra hardware. Furthermore, the presented scheme is also applicable to the single-phase NPC three-level inverter. It can maintain the neutral-point voltage balance at full modulation index and improve the voltage-balancing dynamic performance of the single-phase NPC three-level inverter. The performance of the proposed strategy and its benefits over other previous techniques are verified experimentally.

• Journal of Electrical Engineering and Technology
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• 제9권2호
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• pp.489-500
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• 2014

This paper presents a simple modified unipolar carrier-based pulsewidth modulation (CB-PWM) strategy for the three-level neutral-point-clamped (NPC) voltage source inverter (VSI). Analytical expressions for the relationship between modulation reference signals and output voltages are derived. The proposed modulation technique for the three-level NPC VSI includes the maximum and minimum of the three-phase sinusoidal reference voltages with zero-sequence voltage injection concept. The proposed modified CB-PWM strategy incorporates a novel method that requires only of one triangular carrier wave for generate the gating pulses in three-level NPC VSI. It has the advantages of being simplifying the algorithm with no need of complex two/multi-carrier pulsewidth modulation or space vector modulation (SVM) and it's also simple to implement. The possibility of the proposed CB-PWM technique has been verified though computer simulation and experimental results.

• Journal of Power Electronics
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• 제16권4호
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• pp.1598-1611
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• 2016

In some special occasions with strict size requirements, such as mine hoists, improving the design accuracy of the forced-air cooling systems of NPC three-level inverters is a key technology for improving the power density and decreasing the volume. First, a fast power-loss calculation method was brought. Its calculation principle introduced in detail, and the computation formulas were deduced. Secondly, the average and dynamic power losses of a 1MW mine hoist acting as the research target were analyzed, and a forced-air cooling system model based on a series of theoretical analyses was designed with the average power loss as a heat source. The simulation analyses proves the accuracy and effectiveness of this cooling system during the unit lifting period. Finally, according to an analysis of the periodic working condition, the maximum power-loss range of a NPC three-level inverter under multi cycle operation was obtained and its dynamic power loss was taken into the optimized cooling system model as a heat source to solve the power device damage caused by instantaneous heat accumulation. The effectiveness and feasibility of the optimization design based on the dynamic power loss calculation of the maximum power-loss range was proved by simulation and experimental results.

• 전력전자학회논문지
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• 제13권1호
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• pp.22-32
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• 2008

본 논문에서는 전철 구동용 견인 전동기의 구동을 위한 과변조 영역에서의 NPC형 3-레벨 인버터의 출력전압 선형화 기법을 제안한다. 과변조 영역은 Modulation Index: MI에 따라서 2가지 모드로 나누었으며 과변조영역 I에서는 퓨리에 시리즈를 통한 기본파성분의 크기로 유도된 reference angle을 사용하였다. 과변조영역 II에서는 과변조영역 I과 같은 방법으로 holding angle을 구하여 사용하였다. 이 두 가지 과변조기법을 통하여 PWM 인버터 출력전압을 1펄스 모드까지 선형적으로 획득할 수 있다.

• 전력전자학회논문지
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• 제14권6호
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• pp.472-480
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• 2009

본 논문은 3상 NPC형 3레벨 인버터의 과변조 SVPWM 기법과 변조비에 대한 출력전압의 고조파를 분석하였다. 3상 NPC형 3레벨 인버터는 SVPWM을 적용하여 선형영역을 0.907까지 확장하였고 과변조 영역에서는 푸리에 급수에 의한 추종전압의 보상기법을 적용하여 6 스텝영역까지 운전할 수 있도록 하였다. PWM 형태인 출력전압의 고조파 특성분석에는 PD방식의 멀티 캐리어 기법에 대하여 이중 푸리에 급수를 적용하여 해석하였다. 시뮬레이션은 PSIM을 사용하여 구현하였고 3레벨 인버터의 영역도의 각 영역에 대해서 고조파의 특성을 확인하였다. NPC형 3레벨 인버터의 고조파 분포는 선형영역에서는 캐리어 주파수의 측대 고조파가 분포되고, 과변조 영역으로 넘어가면서 기본파에 의한 고조파 성분이 점차 증가하고 캐리어 주파주의 사이드 밴드의 고조파 성분은 감소함을 확인하였다. 본 논문에서의 고조파 해석을 검증하기 위하여 동일한 조건에서 시뮬레이션과 실험을 수행하였다.

• Journal of Electrical Engineering and Technology
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• 제12권3호
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• pp.1203-1210
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• 2017

Switched-inductor (SL) Z-source three-level inverter is a novel high power topology. The SL based impedance network can boost the input dc voltage to a higher value than the single LC impedance network. However, as all the neutral-point-clamped (NPC) inverters, the SL Z-source three-level inverter has to balance the neutral-point (NP) potential too. The principle of the inverter is introduced and then the effects of NP potential unbalance are analyzed. A NP balancing method is proposed. Other than the methods for conventional NPC inverter without Z-source impedance network, the upper and lower shoot-through durations are corrected by the feedforward compensation factors. With the proposed method, the NP potential is balanced and the voltage boosting ability of the Z-source network is not affected obviously. Simulations are conducted to verify the proposed method.

• 전력전자학회논문지
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• 제27권6호
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• pp.535-540
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• 2022

DC-link capacitors are reliability-critical components in a photovoltaic (PV) inverter. Typically, the lifetime of a DC-link capacitor is evaluated by considering the voltage and hot-spot temperature of the capacitor under the specific operating condition of the PV inverter. However, the output of the PV inverter is determined by solar irradiation and ambient temperature, which vary with the seasons; accordingly, the hot-spot temperature of the capacitor also changes. Therefore, the mission profile of the PV system should be considered to effectively evaluate the reliability of the DC-link capacitor. In this study, the reliability of the DC-link capacitor of a three-level NPC inverter is comparatively analyzed with and without considering the mission profiles of the PV system, where two mission profiles recorded in Arizona and Iza are considered. The accumulated damage of the DC-link capacitor is calculated based on the lifetime model by analyzing its thermal loading. Afterward, a reliability evaluation of the DC-link capacitor is performed at the component level and then at the system level by considering all capacitors by means of Monte Carlo analysis. Results reveal the importance of performing a mission-profile-based reliability evaluation during the design of high-reliability PV inverters to achieve the target reliability performance.