• Proceedings of the KIPE Conference
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• 2010.07a
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• pp.500-501
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• 2010

본 논문에서는 출력전압레벨수를 증가시키기 위한 방안으로 3의 n승비의 입력전압원을 가지는 비절연방식과 동일한 레벨 형성을 위해 변압기 이차 측을 직렬로 결합시킨 절연 방식의 멀티레벨 인버터의 특성을 비교 분석한다. 두 회로는 동일하게 3의 배수의 전압원을 가감하여 선형적인 출력 전압 레벨을 형성할 수 있다. 다단 변압기를 적용하는 방식은 하나의 입력전압원을 가지고 변압기의 권선비를 3의 배수로 설계하여 출력전압의 순시치가 다단의 출력전압 레벨을 형성하는 개념이며, 제안된 방식은 전압원이 3의 배수 형태로 이루어진 경우 동일한 출력전압 레벨을 생성시킬 수 있는 구조이다. 따라서 제안된 구조가 회로 소자수 측면과 효율 특성에 있어 보다 우수한 특성을 가지게 된다. 두 회로의 비교 분석을 위한 시뮬레이션을 수행하고 타당성을 검증한다.

• Journal of Power Electronics
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• v.19 no.5
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• pp.1182-1192
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• 2019

In order to improve the conversion efficiency and mitigate the EMI problem of conventional hard-switching inverters, a new soft-switching DC-AC inverter with a compact structure and a low modulation complexity is proposed in this paper. In the proposed structure, resonant inductors are connected in series for the arm branches, and resonant capacitors are connected in parallel for the neutral point branches. With the help of resonant components, the proposed structure achieves zero-current switching on the arm branches and zero-voltage switching on the neutral point branches. When compared with state-of-art soft-switching topologies, the proposed topology does not need auxiliary switches. Moreover, the commutation algorithm to realize soft-switching can be easily implemented. In this paper, the principle of the resonant operation of the proposed soft-switching converter is presented and its performance is verified through simulation studies. The feasibility of the proposed inverter is evaluated experimentally with a 2.4-kW prototype.

• Journal of Power Electronics
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• v.12 no.2
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• pp.285-293
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• 2012

Multilevel inverters have gained attention in high-power applications due to their numerous advantages in comparison with conventional two-level inverters. In this paper a simplified Space-Vector Modulation (SVM) algorithm for a three-level Neutral-Point Clamped (NPC) inverter is implemented on a Freescale$^{(R)}$ DSP56F8037. The algorithm is based on a simplification of the space-vector diagram for a three-level inverter so that it can be used with a two-level inverter. Once the simplification has been achieved, calculation of the dwell times and the switching sequences are carried out in the same way as for the two-level SVM method. Details of the hardware design are included. Experimental results are analyzed to validate the performance of the simplified algorithm.

• Journal of Power Electronics
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• v.19 no.6
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• pp.1393-1402
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• 2019

This paper proposes a new power flow control method for soft-switched, four channel, five level resonant buck dc-dc converters. These converters have two input channels, which can be supplied from sources with identical or different voltages, and four output channels with arbitrary output voltages. They are specially designed to supply multilevel inverters. The design methodology for their power flow control has been developed considering a general case when the input voltages, output voltages and loads can be asymmetrical. A special emphasize is paid to the limitations and restrictions of operation. The theoretical studies are confirmed by numerical simulations and laboratory tests carried out at various operation points. Exploiting the advantages of the newly proposed power control strategy, the converter can supply five level inverters in dc microgrids, active filters, power factor correctors and electric drives. They can also play an interfacing role in renewable energy systems.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.7
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• pp.846-853
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• 2018

In this paper, an improved model predictive control (MPC) method is proposed, which reduces the amount of calculations caused by the increased number of candidate voltage vectors with the increased voltage level in multi-level inverters. When the conventional MPC method is used for multi-level inverters, all candidate voltage vectors are considered to predict the next-step current value. However, in the case that the sampling time is short, increased voltage level makes it difficult to consider the all candidate voltage vectors. In this paper, the improved MPC method which can get a fast transient response is proposed with a small amount of the computation by adding new candidate voltage vectors that are set to find the optimal vector. As a result, the proposed method shows faster transient response than the method that considers the adjacent vectors and reduces the computational burden compared to the method that considers the whole voltage vector. the performance of the proposed method is verified through simulations and experiments.

• The Transactions of the Korean Institute of Power Electronics
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• v.17 no.4
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• pp.291-297
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• 2012

Recently, Switching devices become cheaper, depending on the multi-level inverters are considered as the power-conversion systems for high-power and power-quality demanding applications. The multi-level inverters can reduce the THD(Total Harmonic Distortion) as the output which is similar sinusoidal waveform by synthesizing several capacitor DC voltages. However it has some disadvantages such as increased number of components, complex PWM control method. Therefore, this paper is proposed the new multi-level inverter topology using an new H-bridge output stage with a bidirectional auxiliary switch. The proposed topology is the 4-level 3-phase PWM inverter with less switching part than conventional multi-level inverters and reactive power control possible. In order to understand the new multi-level inverter, topology analysis and switching patterns and modes according to the current loop are described in this paper. The proposed multi-level inverter topology is validated through PSIM simulation and the experimental results are provided from a prototype.

• Proceedings of the KIPE Conference
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• 1998.11a
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• pp.13-17
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• 1998

In recent years H-bridge multievel inverters have been focused on and selected as the power inverter in several high voltage and high power application. This paper proposes an new PWM method for the multievel H-bridge inverter systems. The proposed PWM method is a carrierwave-based space vector PWM method which utilizes the phase voltage redundancies considering both the switch and conduction loss of the devices. We describe the new PWM method in detail and the effectiveness of the new PWM method is verified by the simulation results.

• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.4
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• pp.271-276
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• 2021

Arc fault detector based on multilevel DWT with analysis of high-frequency noise components over 100 kHz is proposed in this study to improve the performance in detecting serial arcs and distinguishing them from inverter noise in PV systems. PV inverters generally operate at a frequency range of 20-50 kHz for switching operation and maximum power tracking control, and the effect of these frequency components on the signal for arc detection leads to negative arc detection. High-speed ADC and multilevel DWT are used in this study to analyze frequency components above 100 kHz. Such high frequency components are less influenced by inverter noise and utilized to detect as well as separate DC series arc from inverter noise. Arc detectors identify the input current of PV inverters using a Rogowski coil. The sensed signal is filtered, amplified, and used in 800kSPS ADC and DWT analysis and arc occurrence determination in DSP. An arc detection simulation facility in UL1699B was constructed and AFD tests the proposed detector were conducted to verify the performance of arc detection and performance of distinction of the negative arc. The satisfactory performance of the arc detector meets the standard of arc detection and extinguishing time of UL1699B with an arc detection time of approximately 0.11 seconds.

• Journal of Power Electronics
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• v.17 no.1
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• pp.106-114
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• 2017

In this paper, the Selective Harmonic Mitigation-PWM (SHM-PWM) method is used in single-phase and three-phase Cascaded H-Bridge (CHB) inverters in order to fulfill different power quality standards such as EN 50160, CIGRE WG 36-05, IEC 61000-3-6 and IEC 61000-2-12. Non-equal DC link voltages are used to increase the degrees of freedom for the proposed SHM-PWM technique. In addition, it will be shown that the obtained solutions become continuous and without sudden changes. As a result, the look-up tables can be significantly reduced. The proposed three-phase modulation method can mitigate up to the 50th harmonic from the output voltage, while each switch has just one switching in a fundamental period. In other words, the switching frequency of the power switches are limited to 50 Hz, which is the lowest switching frequency that can be achieved in the multilevel converters, when the optimal selective harmonic mitigation method is employed. In single-phase mode, the proposed method can successfully mitigate harmonics up to the 50th, where the switching frequency is 150 Hz. Finally, the validity of the proposed method is verified by simulations and experiments on a 9-level CHB inverter.

• The Transactions of the Korean Institute of Power Electronics
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• v.11 no.4
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• pp.313-320
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• 2006

In this paper, a design approach of LC trap filter for output side harmonic reduction of single phase NPC multilevel inverter is proposed, and THD of the output voltage and harmonic FFT of the output current are analyzed. The proposed filter consists of a conventional LCR filter cascaded with an LC trap filter and it is tuned to inverter switching frequency. A NPC multilevel inverter inverter is used an inverter system for high power application and DSP(TMS320C31) is used for the controller. The effectiveness of the proposed system confirmed through simulation and experimental results.