• Journal of Power Electronics
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• 제16권2호
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• pp.490-497
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• 2016

The analysis of the switch status of each unit module of a cascaded multi-level inverter reveals that the working condition of the switch of a chopper arm causes unnecessary switching under the conventional unipolar sinusoidal pulse width modulation (SPWM). With an increase in the number of cascaded multilevel inverters, the superposition of unnecessary switching gradually occurs. In this work, we propose an improved SPWM strategy to reduce switching in cascaded multilevel inverters. Specifically, we analyze the switch state of the switch tube of a chopper arm of an H-bridge unit. The redundant switch is then removed, thereby reducing the switching frequency. Unlike the conventional unipolar SPWM technique, the improved SPWM method greatly reduces switching without altering the output quality of inverters. The conventional unipolar SPWM technique and the proposed method are applied to a five-level inverter. Simulation results show the superiority of the proposed strategy. Finally, a prototype is built in the laboratory. Experimental results verify the correctness of the proposed modulation strategy.

• 전력전자학회논문지
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• 제15권5호
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• pp.376-380
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• 2010

본 논문에서는 양방향 스위치를 가지는 기존의 5-레벨 인버터를 직렬 결합하여 다수의 출력 전압 레벨을 형성할 수 있는 멀티레벨 인버터 구조를 제안한다. 무엇보다도 제안된 회로의 입력 전압원 크기를 5의 배수로 구성함으로서 보다 많은 수의 레벨을 생성시킬 수 있다. 동일한 수의 출력 전압 레벨 형성시 기존의 Cascaded H-bridge cell 방식보다 스위칭 소자를 줄일 수 있어 시스템 크기, 비용, 전력 손실을 저감시킬 수 있는 장점을 가진다. 두 대의 5-레벨 인버터를 직렬 결합함으로써 25-레벨의 출력전압을 생성시킬 수 있는 인버터에 대한 특성을 분석하고 시뮬레이션과 실험을 통해 타당성을 검증한다.

• Journal of Power Electronics
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• 제19권4호
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• pp.907-921
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• 2019

This paper presents two advanced hybrid pulse-width modulation (PWM) strategies for multilevel inverters (MLIs) that provide both common-mode voltage (CMV) elimination and current ripple reduction. The first PWM utilizes sequences that apply one switching state at the double ends of a half-carrier cycle. The second PWM combines the advantages of the former and an existing four-state PWM. Analyses of the harmonic characteristics of the two groups of switching sequences based on a general switching voltage model are carried out, and algorithms to optimize the current ripple are proposed. These methods are simple and can be implemented online for general n-level inverters. Using a three-level NPC inverter and a five-level CHB inverter, good performances in terms of the root mean square current ripple are obtained with the proposed PWM schemes as indicated through improved harmonic distortion factors when compared to existing schemes in almost the entire region of the modulation index. This also leads to a significant reduction in the current total harmonic distortion. Simulation and experimental results are provided to verify the effectiveness of the proposed PWM methods.

• Journal of Power Electronics
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• 제19권3호
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• pp.727-743
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• 2019

This paper presents a pulse-width modulation strategy to eliminate the common mode voltage (CMV) with reduced CMV spikes in multilevel inverters since a high CMV magnitude and its fast variations dv/dt result in bearing failure of motors, overvoltage at motor terminals, and electromagnetic interference (EMI). The proposed method only utilizes the zero CMV states in a space vector diagram and it is implemented by a carrier-based pulse-width modulation (CBPWM) method. This method is generalized for odd number levels of inverters including neutral-point-clamped (NPC) and cascaded H-bridge inverters. Then it is extended to the over-modulation mode. The over-modulation mode is implemented by using the two-limit trajectory principle to maintain linear control and to avoid look-up tables. Even though the CMV is eliminated, CMV spikes that can cause EMI and bearing current problems still exist due to the deadtime effect. As a result, the deadtime effect is analyzed. By taking the deadtime effect into consideration, the proposed method is capable of reducing CMV spikes. Simulation and experimental results verify the effectiveness of the proposed strategy.

• Journal of Power Electronics
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• 제19권6호
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• pp.1458-1466
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• 2019

Multilevel inverters have appeared as a successful and utilitarian solution in many power applications. The prime objective of an inverter is to keep the fundamental component of the output voltage of a multilevel inverter at a preferred value. Equally important is the need to keep the harmonic components in the output voltage within stated harmonic limits. Therefore, the basis of this research is to develop a harmonic minimization function that optimizes the switching angles of cascaded H-bridge multilevel inverter. Due to benefits of the Cuckoo Search (CS) algorithm, it is applied to determine the switching angles, which are further used to generate the switching pattern for firing the H-bridges of multilevel inverter. Simulation results are compared with SPWM based firing scheme. The switching frequency for SPWM firing scheme is taken as 200 Hz since the switching losses are increased when switching frequency is high. To validate the ability of Cuckoo Search optimized firing scheme in minimization of harmonics, experimental results obtained from hardware prototype of Five Level Cascaded H-Bridge Multilevel Inverter equipped with a FPGA controller are presented to verify the simulation results.

• Journal of Magnetics
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• 제21권1호
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• pp.83-93
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• 2016

Due to their performances and inherent benefits, especially in medium-voltage and high-power applications, multilevel inverters have received an increasing attention in real world industrial applications. The present paper deals with a review of the main multilevel inverter topologies as well their most common derived and hybrid structures quoted in previous research works. It also encompasses an investigation on voltage harmonic elimination and THD estimation. For that reason, the paper summarizes the most relevant modulation techniques used so far to enhance the output voltage quality. Theoretical formulas evoked in the literature, for calculating the output voltage THD upper and lower bounds are reported and verified by adequate simulations.

• Journal of international Conference on Electrical Machines and Systems
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• 제2권3호
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• pp.321-329
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• 2013

A multilevel inverter employing a cascade transformer is proposed for a silent-discharge-tube ozone generating system. The proposed inverter consists of four full-bridge inverters and fourteen transformers which have a series-connected secondary. It can accurately control the amplitude of the output voltage; hereby, it improves a linear characteristic of the rate of ozone yielding. The power regulation characteristics and operational principle of the proposed system are explained from a practical point of view. High precision ozone generating performance of the proposed multilevel inverter is verified by computer-aided simulations and experiment results.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(1)
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• pp.335-340
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• 2004

Recently, multilevel H-bridge inverters have become more popular in medium to high power ac drive applications. One of significant advantages of them is low harmonic contents in their input line currents thanks to the transformer with multiple phase-shifted secondary windings. This paper attempts to provide basic guidelines for the design of the phase shifting transformer windings and theoretical analysis of input line current harmonics.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권4호
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• pp.451-462
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• 2016

Photovoltaic energy conversion becomes main focus of many researches due to its promising potential as source for future electricity and has many advantages than the other alternative energy sources like wind, solar, ocean, biomass, geothermal etc. In Photovoltaic power generation multilevel inverters play a vital role in power conversion. The three different topologies, diode-clamped (neutral-point clamped) inverter, capacitor-clamped (flying capacitor) inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each pv array can act as a separate dc source for each h-bridge module. This paper presents a single phase Cascaded H-bridge five level inverter for grid-connected photovoltaic application using sinusoidal pulse width modulation technique. This inverter output voltage waveform reduces the harmonics in the generated current and the filtering effort at the input. The control strategy allows the independent control of each dc-link voltages and tracks the maximum power point of PV strings. This topology can inject to the grid sinusoidal input currents with unity power factor and achieves low harmonic distortion. A PID control algorithm is implemented in Arm Processor LPC2148. The validity of the proposed inverter is verified through simulation and is implemented in a single phase 100W prototype. The results of hardware are compared with simulation results. The proposed system offers improved performance over conventional three level inverter in terms of THD.

• Journal of Power Electronics
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• 제14권4호
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• pp.671-677
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• 2014

In this paper, a new basic unit is proposed. Then, a cascaded multilevel inverter basded on the series connection of n number of these new basic units is proposed. In order to generate all of the voltage levels (even and odd) at the output, three different algorithms to determine the magnitude of the dc voltage source are proposed. Reductions in the number of power switches, driver circuits and dc voltage sources in addition to increases in the numbr of output voltage levels are some of the advantages of the proposed cascaded multilevel inverter. These results are obtained through a comparison of the proposed inverter and its algorithms with an H-bridge cascaded multilevel inverter from the point of view of the number of power electronic devices. Finally, the capability of the proposed topology with its proposed algorithms in generating all of the voltage levels is verified through experimental results on a laboratorary prototype of a 49-level inverter.