• Journal of Power Electronics
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• v.13 no.2
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• pp.296-303
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• 2013

This paper proposes a high efficiency three-phase cascaded phase shifted H-bridge multi-level inverter without DC/DC converters for grid-tied multi string photovoltaic (PV) applications. The cascaded H-bridge topology is suitable for PV applications since each PV module can act as a separate DC source for each cascaded H-bridge module. The proposed phase shifted H-bridge multi-level topology offers advantages such as operation at a lower switching frequency and a lower current ripple when compared to conventional two level topologies. It is also shown that low ripple sinusoidal current waveforms are generated with a unity power factor. The control algorithm permits the independent control of each DC link voltage with a maximum power point for each string of PV modules. The use of the controller area network (CAN) communication protocol for H-bridge multi-level inverters, along with localized PWM generation and PV voltage regulation are implemented. It is also shown that the expansion and modularization capabilities of the H-bridge modules are improved since the individual inverter modules operate more independently. The proposed topology is implemented for a three phase 240kW multi-level PV power conditioning system (PCS) which has 40kW H-bridge modules. The experimental results show that the proposed topology has good performance.

• The Transactions of the Korean Institute of Power Electronics
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• v.11 no.4
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• pp.313-320
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• 2006

In this paper, a design approach of LC trap filter for output side harmonic reduction of single phase NPC multilevel inverter is proposed, and THD of the output voltage and harmonic FFT of the output current are analyzed. The proposed filter consists of a conventional LCR filter cascaded with an LC trap filter and it is tuned to inverter switching frequency. A NPC multilevel inverter inverter is used an inverter system for high power application and DSP(TMS320C31) is used for the controller. The effectiveness of the proposed system confirmed through simulation and experimental results.

• Proceedings of the KIPE Conference
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• 2014.07a
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• pp.496-497
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• 2014

본 논문은 Cascaded H-bridge 멀티레벨 인버터의 출력 전압 레벨 수의 증가를 위한 모델과 스위칭 기법을 제안한다. 제안하는 모델은 기존의 Cascaded H-bridge 멀티레벨 인버터 구조에서 각 H-bridge 모듈의 출력단에 변압기를 연결하고, 변압기 2차측을 직렬로 연결한 모델이다. 이 구조에서 다수의 변압기의 턴비는 동일하고, 1개의 변압기 턴비만이 다른 턴비를 갖게된다. 따라서 1개의 변압기 턴비를 조절하여 출력전압의 전압 레벨수를 증가시킬 수 있다. 스위칭 방법은 기존에 멀티레벨 인버터에서 주로 사용되는 Level-shifted PWM 방식을 이용하여 간단하게 구현할 수 있다. 제안하는 모델의 검증을 위하여 시뮬레이션을 수행하여 제안하는 모델의 타당성을 확인한다.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.61-62
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• 2012

본 논문에서는 다중 반송파 정현 펄스폭 변조방식으로 제어되는 Cascaded H-bridge 멀티레벨 PWM 인버터의 스위칭 손실 저감을 위한 스위칭 패턴을 제안한다. 부하 담당 전력이 상대적으로 큰 H-bridge 모듈의 스위치는 저주파의 기본 출력 전압 레벨을 형성하도록 동작시키며, 부하 담당 전력이 상대적으로 작은 H-bridge 모듈의 스위치는 고주파의 PWM 파형을 기본파에 가감하여 출력전압 파형이 사인파에 가까워지도록 스위칭 패턴을 형성한다. 본 논문에서는 제안된 스위칭 패턴을 PD, APOD 방식의 다중 반송파 정현 펄스폭 변조방식으로 구현하여 Cascaded H-bridge 멀티레벨 PWM 인버터에 적용시키고 실험을 통해 기존의 스위칭 패턴에 비해 스위칭 손실이 개선됨을 증명한다.

• Journal of Power Electronics
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• v.17 no.1
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• pp.106-114
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• 2017

In this paper, the Selective Harmonic Mitigation-PWM (SHM-PWM) method is used in single-phase and three-phase Cascaded H-Bridge (CHB) inverters in order to fulfill different power quality standards such as EN 50160, CIGRE WG 36-05, IEC 61000-3-6 and IEC 61000-2-12. Non-equal DC link voltages are used to increase the degrees of freedom for the proposed SHM-PWM technique. In addition, it will be shown that the obtained solutions become continuous and without sudden changes. As a result, the look-up tables can be significantly reduced. The proposed three-phase modulation method can mitigate up to the 50th harmonic from the output voltage, while each switch has just one switching in a fundamental period. In other words, the switching frequency of the power switches are limited to 50 Hz, which is the lowest switching frequency that can be achieved in the multilevel converters, when the optimal selective harmonic mitigation method is employed. In single-phase mode, the proposed method can successfully mitigate harmonics up to the 50th, where the switching frequency is 150 Hz. Finally, the validity of the proposed method is verified by simulations and experiments on a 9-level CHB inverter.

• Journal of Power Electronics
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• v.17 no.5
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• pp.1186-1194
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• 2017

This paper proposes an improved low frequency Selective Harmonic Mitigation-PWM (SHM-PWM) technique. The proposed method mitigates the low order harmonics of the output voltage up to the $50^{th}$ harmonic well and satisfies the grid codes EN 50160 and CIGRE-WG 36-05. Using a modified criterion for the switching angles, the range of the modulation index for non-linear SHM equations is improved, without increasing the switching frequency of the CHB converter. Due to the low switching frequency of the CHB converter, mitigating the harmonics of the converter up to the $50^{th}$ order and finding a wider modulation index range, the size and cost of the passive filters can be significantly reduced with the proposed technique. Therefore, the proposed technique is more efficient than the conventional SHM-PWM. To verify the effectiveness of the proposed method, a 7-level Cascaded H-bridge (CHB) converter is utilized for the study. Simulation and experimental results confirm the validity of the above claims.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1706-1715
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• 2016

In this paper, a single phase modified switched-diode topology for both symmetrical and asymmetrical cascaded multilevel inverters is presented. It consists of a Modified Switched-Diode Unit (MSDU) and a Twin Source Two Switch Unit (TSTSU) to produce distinct positive voltage levels according to the operating modes. An additional H-bridge synthesizes a voltage waveform, where the voltage levels of either polarity have less Total Harmonic Distortion (THD). Higher-level inverters can be built by cascading MSDUs. A comparative analysis is done with other topologies. The proposed topology results in reductions in the number of power switches, losses, installation area, voltage stress and converter cost. The Nearest Level Control (NLC) technique is employed to generate the gating signals for the power switches. To verify the performance of the proposed structure, simulation results are carried out by a PSIM under both steady state and dynamic conditions. Experimental results are presented to validate the simulation results.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.453-454
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• 2011

본 논문에서는 벅-부스트와 포워드 컨버터의 기능을 갖는 컨버터를 제안한다. 제안하는 컨버터는 Cascaded H-bridge 멀티레벨인버터와 같이 다수의 독립된 전원을 요구하는 회로 구조를 단일 입력 전원단으로 구성할 수 있는 특징을 가진다. 벅-부스트 컨버터의 입력 인덕터는 변압기로 대체되며 컨버터 스위치의 ON 동작시 포워드 동작에 의해 변압기 2차측으로 전력전달이 이루어지며, 스위치 OFF시 변압기 1차측 자화인덕턴스에 저장된 에너지가 비절연된 벅-부스트 컨버터의 출력 커패시터로 전달된다. 제안된 컨버터의 동작 모드에 따른 이론적 분석을 시행하고 시뮬레이션을 통해 타당성을 검증한다.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.455-456
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• 2011

본 논문에서는 Boost 컨버터와 Forward 컨버터를 조합한 컨버터를 제안한다. 제안하는 컨버터는 시스템 구성상 다수의 독립된 전원을 요구하는 Cascaded H-bridge 멀티레벨인버터와 같은 회로구조에 있어 다수의 독립전원의 확보가 곤란한 경우 단일 입력 전원단으로 시스템을 구성할 수 있는 특징을 가진다. Boost 컨버터의 입력 인덕터는 변압기로 대체되며 컨버터 스위치의 ON 동작시 변압기 일차측 자화인덕턴스에 저장된 에너지가 변압기 이차측과 비절연된 Boost 컨버터의 출력 커패시터로 전달된다. 제안된 컨버터의 동작 모드에 따른 이론적 분석을 시행하고 시뮬레이션을 통해 타당성을 검증한다.

• Journal of Power Electronics
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• v.16 no.2
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• pp.399-413
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• 2016

This paper presents a topology for a modular power electronic transformer (PET) and a control scheme. The proposed PET consists of a cascaded H-Bridge rectifier on the primary side, a high-frequency DC/DC conversion cell in the center, and a cascaded H-Bridge inverter on the secondary side. It is practical to use PETs in power systems to reduce the cost, weight and size. A detailed analysis of the structure is carried out by using equivalent circuit. An algorithm to control the voltages of each capacitor and to maintain the power flow in the PET is established. The merits are analyzed and verified in theory, including the bi-directional power flow, variable voltage/frequency and high power factor on the primary side. The experimental results validated the propose structure and algorithm.