• Journal of Biomedical Engineering Research
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• v.15 no.3
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• pp.317-324
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• 1994

This paper proposed a new method in the implementation of ISDN (integrated services digital network) LAPD (link access procedure on the D-channel) and LAPB (link access procedure on the B-channel) protocols. The proposed method in this paper implement ISDW LAPD protocol through multi-tasking operating system and adopt a kernel part that is changed operating system to target board. The features of implemented system are (1) the para.llel processing of the events generated at each layer, as follows (2) the supporting necessary timers for the implementation of ISDW LAPD protocol from the kernel part by using software, (3) the recommanded SAP (Service Access Point) from CCITT was composed by using port function in the operating system. With the proposed method, the protocols of ISDH layerl, layer2 and layer3 (call control) were implemented by using the kernel part and related tests were carried out by connecting the ISDH terminal simulator to ISDN S-interface system using the ISDN LAPD protocol The results showed that ISDW S-interface terminals could be discriminated by TEI (Terminal Equipment Identifier) assignment in layer 2 (LAPD) and the message transmission of layer 3 was verified by establishing the multi-frame transmission and then through the path established by the LAPD protocol, a user data was tranfered and received on B-channel with LAPB protocol Thererfore, as new efficient ISDN S-interface environment was implemented in the thesis, it was verified that the implemented system can be utilized by connecting ISDW in the future to transfer a medical image data.

• The KIPS Transactions:PartD
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• v.15D no.3
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• pp.355-360
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• 2008

The complicated embedded system for multi-tasking requires RTOS(real-time operating system). It uses the optimal OS and processor to each embedded system on the heterogeneous development environment. This paper is proposed to use UML profile of OS API and Processor Configuration, instead of cross-compiling for developing the heterogeneous embedded system. This reduces the development time and cost through generating the automatic source code with the profile information of each embedded system. We generate and port the code after modeling the two heterogeneous real time operating systems (brickOS and uC/OS-II) and the processors (Hitachi H8 and Intel PXA255) with our proposed profile of the heterogeneous embedded system.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.6
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• pp.2815-2822
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• 2011

Clustering method in wireless sensor networks is the technique that forms the cluster to aggregate the data and transmit them at the same time that they can use the energy efficiently. In this paper, I propose the hierarchical unequal clustering method using cluster group model. This divides the entire network into two layers. The data aggregated from layer 2 consisted of cluster group is sent to layer 1, after re-aggregation the total data is sent to base station. This method decreases whole energy consumption by using cluster group model with multi-hop communication architecture. Hot spot problem can be solved by establishing unequal cluster. I also show that proposed hierarchical unequal clustering method is better than previous clustering method at the point of network energy efficiency.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.6
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• pp.59-70
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• 2004

SMT(Simultaneous Multi Threading) architecture uses TLP(Thread Level Parallelism) and increases processor throughput, such that issue slots can be filled with instructions from multiple independent threads. Having multiple ready threads reduces the probability that a functional unit is left idle, which increases processor efficiency. To utilize those advantages for the SMT processors, the issue unit must control the flow of instructions from different threads and not create conflicts among those instructions, which make the SMT issue logic extremely complex. Therefore, our SMT architecture, which is modeled in this paper, uses an in-order-issue and completion scheme, and therefore, can use a simple issue mechanism with a scoreboard already instead of using register renaming or a reorder buffer. However, an SMT scoreboarding mechanism is still more complex and costlier than that of a single threaded conventional processor. This paper proposes an optimal implementation of a scoreboarding mechanism for an ARM-based SMT architecture.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.12
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• pp.1712-1718
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• 2013

This paper proposes a compact dual-band 3-way power divider that helps lowering the weight of a transceiver for the L-band or multi-purpose satellite communication. Instead of the multi stages or tapering which ends up with loss accumulation and size-growth, the non-linear dispersive phases from the metamaterial CRLH(composite right and left-handed) properties are obtained by the accurate formulation and implemented by the short transmission line segments. Firstly, the CRLH dual-band two-way unequal power divider and equal power divider are separately designed. And then, the input of the two-way equal power divider is plugged in the output port of the unequal one, and the entire geometry is slightly adjusted for the desirable performance. The circuit analysis and full-wave simulation are used to predict the frequency responses and validated by the measurement of the prototype. Besides, the size-reduction effect is addressed.

• Journal of the Korean Society for Marine Environment & Energy
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• v.13 no.3
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• pp.206-215
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• 2010

The multi-outlets were installed on the existing seawater exchange breakwater in order to improve seawater exchange rate at Jumunjin harbor. Physical and numerical model system were fulfilled for 4 cases to evaluate seawater exchange system which is able to discharge water remotely. The seawater circulation pattern and seawater exchange rate in the harbor were compared and analyzed. Consequently, total seawater exchange rate for CASE 1 was calculated 48% due to the dead zones which hinder seawater circulation in the harbor. Otherwise, the seawater exchange rates of CASE 2, CASE 3, and CASE 4 with the installation of the system were enhanced 19%, 15% and 17%, respectively compare to CASE 1.

• Journal of the Semiconductor & Display Technology
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• v.10 no.4
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• pp.7-13
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• 2011

In this paper, the IC(Integrated Circuit) for multi-channel synchronous communication was designed by using FPGA and VHDL language. The existing chips for synchronous communication that has been used commercially are composed for one to two channels. Therefore, when communication system with three channels or more is made, the cost becomes high and it becomes complicated for communication system to be realized and also has very little buffer, load that is placed into Microprocessor increases heavily in case of high speed communication or transmission of high-capacity data. The designed IC was improved the function and performance of communication system and reduced costs by designing 8 synchronous communication channels with only one IC, and it has the size of transmitter/receiver buffer with 1024 bytes respectively and consequently high speed communication became possible. It was designed with a communication signal of a form various encoding. To detect errors of communications, the CRC-ITU-T logic and channel MUX logic was designed with hardware logics so that the malfunction can be prevented and errors can be detected more easily and input/output port regarding each communication channel can be used flexibly and consequently the reliability of system was improved. In order to show the performance of designed IC, the test was conducted successfully in Quartus simulation and experiment and the excellence was compared with the 85C3016VSC of ZILOG company that are used widely as chips for synchronous communication.

• Proceedings of the Korean Geotechical Society Conference
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• 2009.09a
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• pp.815-826
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• 2009

The paper presents a case study addressing the design and construction aspects for DCM(Deep Cement Mixing) method employed as the foundation of a caisson type breakwater with heavy weight(10,700 ton/EA) and a high design wave height($H_{1/3}$=8.7m). The DCM was designed for the project(Ulsan New Port North Breakwater Phase 1) by optimizing the pattern of DCM columns with a combination of short and long columns (i.e., block type(upper 3m)+wall type(lower)) and considering overlapped section between columns as a critical section against shear force where the coefficient of effective width of treated column($\alpha$) was estimated with caution. It was shown that the value can be 0.9 under the condition with the overlapped width of 30cm. In addition to that, a field trial test was performed after improving conventional DCM equipment (e.g., mixing blades, cement paste supplying pipes, multi auger motor, etc.) to establish a standardized DCM construction cycle (withdrawal rate of mixing blades) which can provide the prescribed strength. The result of the field strength test for cored DCM specimens shows that the averaged strength is larger than the target strength and the distribution of the strength(with a defect rate of 7%) also satisfies with the quality control normal distribution curve which allows defect rate of 15.9%.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.45 no.8
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• pp.114-120
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• 2008

In this paper, we extract the parasitic elements of the metal-insulate-metal(MIM) capacitor using short-open calibration (SOC). The scattering matrixes of short, open, and MIM structures in strip lines are measured by full electro-magnetic (EM) simulator and vector network analyser. The full EM simulations are performed by finite element method (FEM) that was fitted three dimensional structure analysis. The electro-magnetic effects of MIM capacitor laminated in the multi-layered structures are proposed the II equivalent circuit with lumped elements, and the relations between the measured scattering parameters of the MIM structures and lumped elements in the circuits are shown by performing 2 port network analysis. The extracted lumped elements using the proposed SOC method are independent to frequencies.

• Journal of IKEEE
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• v.19 no.4
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• pp.625-631
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• 2015

In this paper, an 8051 microcontroller with application-specific instructions and I/O ports for data transmission is designed. The designed microcontoller includes two UART ports and one SMBus port to control external devices and to transmit data with them. Application-specific instruction is developed and added to the instruction set to exploit these I/O ports. So the designed microcontroller can perform multi-device control and multi-byte transmission. Also, it can reduce the code size of the application program. Especially, the designed microcontroller does not stall and can execute other programs during data transmission, which significantly increases its efficiency. Synthesized in 0.18 um technology, the area overhead due to application-specific instructions was negligible. Operations of all instructions and I/O ports were verified to run correctly on a FPGA board.