• Title/Summary/Keyword: Multi-Block Technique

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Fabrication of the Integrated Triplexer Using Micro Block Stacking Method (Micro-block Stacking 방법으로 제작한 집적형 Triplexer 제작 및 특성 측정)

  • Yoon, Hyun-Jae;Kim, Jin-Won
    • Korean Journal of Optics and Photonics
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    • v.23 no.5
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    • pp.217-221
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    • 2012
  • In this paper, we have fabricated by means of the "Micro-Block Stacking (MBS)" method the 8 pin mini DIL integrated Triplexer, which can transmit CATV and voice/data at the same time in a single fiber. Our MBS technique is a novel scheme of compact optical module packaging which secures precision positioning of the components on the optical beam path by prefixed stacks of ceramic blocks. The subassembly in which a laser diode, two receiver photodiodes, two WDM filters, and four micro lenses are integrated is only $5.40mm{\times}2.15mm{\times}1.05mm$ in size. As the Triplexer is aligned to the single mode fiber, the transmitter power of -14.5 dBm and the receiver sensitivities of 0.83 A/W, 0.73 A/W for 1550 nm, 1490 nm, respectively are obtained.

A Smart Caching Scheme for Wireless Home Networking Services (무선 홈 네트워킹 서비스를 위한 스마트 캐싱 기법)

  • Lee, Chong-Deuk
    • Journal of Digital Convergence
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    • v.17 no.9
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    • pp.153-161
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    • 2019
  • Discrimination of media object segments in wireless home proxies has a significant impact on caching delay, and caching delay degrades the performance of the proxy. In this paper, we propose a Single Fetching Smart Caching (SFSC) strategy and a Multi-Fetching Smart Caching (MFSC) strategy to improve the proxy performance of the home network and improve the caching performance for media object segments. The SFSC strategy is a technique that performs caching by sequential fetching of object segments requested by the home node one at a time, which guarantees a faster cache hit rate, and the MFSC strategy is a technique that caches the media object segments by blocking object segments requested by the home node one at a time, which improves the throughput of cache. Simulation results show that the cache hit rate and the caching delay are more efficient than the MFSC technique, and the throughput of the object segment is more efficient than that of the SFSC technique.

A lightweight technique for hot data identification considering the continuity of a Nand flash memory system (낸드 플래시 메모리 시스템 기반의 지속성을 고려한 핫 데이터 식별 경량 기법)

  • Lee, Seungwoo
    • Journal of Internet of Things and Convergence
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    • v.8 no.5
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    • pp.77-83
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    • 2022
  • Nand flash memory requires an Erase-Before-Write operation structurally. In order to solve this problem, it can be solved by classifying a page (hot data page) where data update operation occurs frequently and storing it in a separate block. The MHF (Multi Hash Function Framework) technique records the frequency of data update requests in the system memory, and when the recorded value exceeds a certain standard, the data update request is judged as hot data. However, the method of simply counting only the frequency of the data update request has a limit in judging it as accurate hot data. In addition, in the case of a technique that determines the persistence of a data update request, the fact of the update request is recorded sequentially based on a time interval and then judged as hot data. In the case of such a persistence-based method, its implementation and operation are complicated, and there is a problem of inaccurate judgment if frequency is not considered in the update request. This paper proposes a lightweight hot data determination technique that considers both frequency and persistence in data update requests.

Spinal Cord Partial Block Technique Using Dynamic MLC

  • Cho, Sam-Ju;Yi, Byong-Yong;Back, Geum-Mun;Lee, Sang wook;Ahn, Seung-Do;Kim, Jong-Hoon;Kwon, Soo-Il;Park, Eun-Kyung
    • Proceedings of the Korean Society of Medical Physics Conference
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    • 2002.09a
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    • pp.138-140
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    • 2002
  • The spinal cord dose is the one of the limiting factor for the radiation treatment of the head & neck (H&N) or the thorax region. Due to the fact that the cord is the elongated shaped structure, it is not an easy task to maintain the cord dose within the clinically acceptable dose range. To overcome this problem, the spinal cord partial block technique (PBT) with the dynamic Multi-Leaf Collimator (dMLC) has been developed. Three dimension (3D) conformal beam directions, which minimize the coverage of the normal organs such as the lung and the parotid gland, were chosen. The PBT field shape for each field was designed to shield the spinal cord with the dMLC. The transmission factors were determined by the forward calculation method. The plan comparisons between the conventional 3D conformal therapy plan and the PTB plan were performed to evaluate the validity of this technique. The conformity index (CI) and the dose volume histogram (DVH) were used as the plan comparison indices. A series of quality assurance (QA) was performed to guarantee the reliable treatment. The QA consisted of the film dosimetry for the verification of the dose distribution and the point measurements. The PBT plan always generated better results than the conventional 3D conformal plan. The PBT was proved to be useful for the H&N and thorax region.

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Replantation of Multi-level Amputated Digit (다중절단수지의 재접합술)

  • Kwon, Soon-Beom;Park, Ji-Ung;Cho, Sang-Hun;Seo, Hyung-Kyo;Whang, Jong-Ick
    • Archives of Plastic Surgery
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    • v.38 no.5
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    • pp.642-648
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    • 2011
  • Purpose: The recent advances in microsurgical techniques and their refinement over the past decade have greatly expanded the indications for digital replantations and have enabled us to salvage severed fingers more often. Many studies have reported greater than 80% viability rates in replantation surgery with functional results. However, replantation of multi-level amputations still remain a challenging problem and the decision of whether or not to replant an amputated part is difficult even for an experienced reconstructive surgeon because the ultimate functional result is unpredictable. Methods: Between January of 2002 and May of 2008, we treated 10 multi-level amputated digits of 7 patients. After brachial plexus block, meticulous replantation procedure was performed under microscopic magnification. Postoperatively, hand elevation, heat lamp, drug therapy and hyperbaric oxygen therapy were applied with careful observation of digital circulation. Early rehabilitation protocol was performed for functional improvement. Results: Among the 19 amputated segments of 10 digits, 16 segments survived completely without any complications. Overall survival rate was 84%. Complete necrosis of one finger tip segment and partial necrosis of two distal amputated segments developed and subsequent surgical interventions such as groin flap, local advancement flap and skin graft were performed. The overall result was functionally and aesthetically satisfactory. Conclusion: We experienced successful replantations of multi-level amputated digits. When we encounter a multi-level amputation, the key question is whether or not it is a contraindication to replantation. Despite the demand for skillful microsurgical technique and longer operative time, the authors' results prove it is worth attempting replantations in multi-level amputation because of the superiority in aesthetic and functional results.

A Mobile Flash File System - MJFFS (모바일 플래시 파일 시스템 - MJFFS)

  • 김영관;박현주
    • Journal of Information Technology Applications and Management
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    • v.11 no.2
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    • pp.29-43
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    • 2004
  • As the development of an information technique, gradually, mobile device is going to be miniaturized and operates at high speed. By such the requirements, the devices using a flash memory as a storage media are increasing. The flash memory consumes low power, is a small size, and has a fast access time like the main memory. But the flash memory must erase for recording and the erase cycle is limited. JFFS is a representative filesystem which reflects the characteristics of the flash memory. JFFS to be consisted of LSF structure, writes new data to the flash memory in sequential, which is not related to a file size. Mounting a filesystem or an error recovery is achieved through the sequential approach. Therefore, the mounting delay time is happened according to the file system size. This paper proposes a MJFFS to use a multi-checkpoint information to manage a mass flash file system efficiently. A MJFFS, which improves JFFS, divides a flash memory into the block for suitable to the block device, and stores file information of a checkpoint structure at fixed interval. Therefore mounting and error recovery processing reduce efficiently a number of filesystem access by collecting a smaller checkpoint information than capacity of actual files. A MJFFS will be suitable to a mobile device owing to accomplish fast mounting and error recovery using advantage of log foundation filesystem and overcoming defect of JFFS.

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RowAMD Distance: A Novel 2DPCA-Based Distance Computation with Texture-Based Technique for Face Recognition

  • Al-Arashi, Waled Hussein;Shing, Chai Wuh;Suandi, Shahrel Azmin
    • KSII Transactions on Internet and Information Systems (TIIS)
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    • v.11 no.11
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    • pp.5474-5490
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    • 2017
  • Although two-dimensional principal component analysis (2DPCA) has been shown to be successful in face recognition system, it is still very sensitive to illumination variations. To reduce the effect of these variations, texture-based techniques are used due to their robustness to these variations. In this paper, we explore several texture-based techniques and determine the most appropriate one to be used with 2DPCA-based techniques for face recognition. We also propose a new distance metric computation in 2DPCA called Row Assembled Matrix Distance (RowAMD). Experiments on Yale Face Database, Extended Yale Face Database B, AR Database and LFW Database reveal that the proposed RowAMD distance computation method outperforms other conventional distance metrics when Local Line Binary Pattern (LLBP) and Multi-scale Block Local Binary Pattern (MB-LBP) are used for face authentication and face identification, respectively. In addition to this, the results also demonstrate the robustness of the proposed RowAMD with several texture-based techniques.

Complexity Reduction of Block-Layered QOSTC with Less Transmission Time (복잡도 감소와 전송시간이 덜 소요되는 블록 층의 준 직교 시공간코드 설계)

  • Abu Hanif, Mohammad;Lee, Moon-Ho;Hai, Han
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.49 no.7
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    • pp.48-55
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    • 2012
  • Because of increasing complexity in maximum-likelihood (ML) decoding of four of higher antenna scenario, Partial Interference Cancellation (PIC) group decoding could be the perfect solution to reduce the decoding complexity occurs in ML decoding. In this paper, we separate the symbols the users in the layered basis and find the equivalent channel matrix. Based on the equivalent channel matrix we provide the grouping scheme. In our paper, we construct a block wise transmission technique which will achieve the desired code rate and reduce the complexity and provide less transmission time. Finally we show the different grouping performance.

Multi-mode Layered LDPC Decoder for IEEE 802.11n (IEEE 802.11n용 다중모드 layered LDPC 복호기)

  • Na, Young-Heon;Shin, Kyung-Wook
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.11
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    • pp.18-26
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    • 2011
  • This paper describes a multi-mode LDPC decoder which supports three block lengths(648, 1296, 1944) and four code rates(1/2, 2/3, 3/4, 5/6) of IEEE 802.11n wireless LAN standard. To minimize hardware complexity, it adopts a block-serial (partially parallel) architecture based on the layered decoding scheme. A novel memory reduction technique devised using the min-sum decoding algorithm reduces the size of check-node memory by 47% as compared to conventional method. From fixed-point modeling and Matlab simulations for various bit-widths, decoding performance and optimal hardware parameters such as fixed-point bit-width are analyzed. The designed LDPC decoder is verified by FPGA implementation, and synthesized with a 0.18-${\mu}m$ CMOS cell library. It has 219,100 gates and 45,036 bits RAM, and the estimated throughput is about 164~212 Mbps at 50 MHz@2.5v.

High-Throughput QC-LDPC Decoder Architecture for Multi-Gigabit WPAN Systems (멀티-기가비트 WPAN 시스템을 위한 고속 QC-LDPC 복호기 구조)

  • Lee, Hanho;Ajaz, Sabooh
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.2
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    • pp.104-113
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    • 2013
  • A high-throughput Quasi-Cyclic Low-Density Parity-Check (QC-LDPC) decoder architecture is proposed for 60GHz multi-gigabit wireless personal area network (WPAN) applications. Two novel techniques which can apply to our selected QC-LDPC code are proposed, including a four block-parallel layered decoding technique and fixed wire network. Two-stage pipelining and four block-parallel layered decoding techniques are used to improve the clock speed and decoding throughput. Also, the fixed wire network is proposed to simplify the switch network. A 672-bit, rate-1/2 QC-LDPC decoder architecture has been designed and implemented using 90-nm CMOS standard cell technology. Synthesis results show that the proposed QC-LDPC decoder requires a 794K gate and can operate at 290 MHz to achieve a data throughput of 3.9 Gbps with a maximum of 12 iterations, which meet the requirement of 60 GHz WPAN applications.