• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.2 s.332
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• pp.65-72
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• 2005

We can integrate more IP blocks on a silicon die as the development of fabrication technologies and EDA tools. Consequently, we can design complicated SoC architecture including multi-processors. However, most of existing SoC buses have bottleneck in on-chip communication because of shared bus architectures, which result in the performance degradation of systems. In most cases, the performance of a multi-processor system is determined by efficient on-chip communication and the well-balanced distribution of computation rather than the performance of the processors. We propose an efficient SoC Network Architecture(SNA) using crossbar routers which provide a solution to ensure enough communication bandwidth. The SNA can significantly reduce the bottleneck of on-chip communication by providing multi-channels for multi-masters. According to the proposed architecture, we design a model system for the SNA. The proposed architecture has a better efficiency by $40\%$ than the AMBA AHB according to a simulation result.

• Journal of the Korean Society for Nondestructive Testing
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• v.30 no.4
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• pp.338-344
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• 2010

A double rotation C-scanning system and a software program Under-Sodium MultiVIEW have been developed for the under-sodium viewing of a reactor core and in-vessel structures of a sodium-cooled fast reactor KALIMER-600. Double rotation C-scanning system has been designed and manufactured by the reproduction of double rotation plug of a reactor head in KALIMER-600. Hardware system which consists of a double rotating scanner, ultrasonic waveguide sensors, a high power ultrasonic pulser-receiver, a scanner driving module and a multi channel A/D board have been constructed. The functions of scanner control, image mapping and signal processing of Under-Sodium MultiVIEW program have been implemented by using a LabVIEW graphical programming language. The performance of Under-Sodium MultiVIEW program was verified by a double rotation C-scanning test in water.

• Progress in Superconductivity and Cryogenics
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• v.24 no.3
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• pp.52-56
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• 2022

Single-grain (c-normal or c-parallel) and multi-grain YBCO superconductors were prepared by a melt growth process with/without seeding. The magnetic levitation force and trapped magnetic field at liquid N₂ temperature (77 K) of the YBCO superconductors were investigated. Samples for the levitation force measurement were zero-field cooled (ZFC) to 77 K, and samples for trapped field measurement were field-cooled (FC) using Nd magnets. As for the magnetic levitation force, the c-normal, single grain sample showed the largest value, whereas the multi-grain sample showed the lowest value. The trapped magnetic field of the c-normal and c-parallel single-grain samples was 4-5 times that of the multi-grain sample. In addition, as the external magnetic field (the number of magnets) increased, the both properties increased proportionally. These results were explained in terms of the orientation dependence of the levitation forces and the magnetic field trapping capability of the YBCO superconductor.

• Journal of the Korea Society of Computer and Information
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• v.21 no.4
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• pp.1-8
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• 2016

In small embedded systems including IoT devices, memory size is very small and it is important to reduce memory amount for execution of application programs. For multi-threaded applications, stack may consume a large amount of memory because each thread has its own stack of sufficiently large size for worst case. This paper presents an implementation of single stack multi-threading, called SSThread (Single Stack Thread), by sharing a stack for all threads to reduce stack memory size. By using SSThread, multi-threaded applications can be programmed based on normal C language environment and there is no requirement of transporting multi-threading operating systems. It consists of several library functions and various C macro definitions. Even though some functional restrictions in comparison to operating systems supporting complete multi-thread functionalities, it is very useful for small embedded systems with tiny memory size and it is simple to setup programming environment for multi-thread applications.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.23 no.2
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• pp.126-131
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• 2011

Cyclone, a type of particle collector widely used in the field of ambient sampling and industrial particulate control, is the principal type of gas-solids separator that uses a centrifugal force. The goal of this study is to design and evaluate the cyclone that can be used for the household vacuum cleaners. A multi cyclone with a 1st cyclone and several 2nd cyclones is designed to improve dust collection efficiency. The dust collection efficiency and the suction power of 1st cyclone are evaluated. And the dust collection efficiency and the suction power of multi cyclone are evaluated according to various sizes of inlet and vortex finder. As a result, a cone shape porous filter has better dust collection efficiency than a cylinder shape porous filter. The dust collection efficiency of a multi cyclone is 3.5% greater than that of a single cyclone.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.322.1-322.1
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• 2014

Many research groups have studied tandem or multi-junction cells to overcome this low efficiency and degradation. In multi-junction cells, band-gap engineering of each absorb layer is needed to absorb the light at various wavelengths efficiently. Various absorption layers can be formed using multi-junctions, such as hydrogenated amorphous silicon carbide (a-SiC:H), amorphous silicon germanium (a-SiGe:H) and microcrystalline silicon (${\mu}c$-Si:H), etc. Among them, ${\mu}c$-Si:H is the bottom absorber material because it has a low band-gap and does not exhibit light-induced degradation like amorphous silicon. Nevertheless, ${\mu}c$-Si:H requires a much thicker material (>2 mm) to absorb sufficient light due to its smaller light absorption coefficient, highlighting the need for a high growth rate for productivity. ${\mu}c$-SiGe:H has a much higher absorption coefficient than ${\mu}c$-Si:H at the low energy wavelength, meaning that the thickness of the absorption layer can be decreased to less than half that of ${\mu}c$-Si:H. ${\mu}c$-SiGe:H films were prepared using 40 MHz very high frequency PECVD method at 1 Torr. SiH4 and GeH4 were used as a reactive gas and H2 was used as a dilution gas. In this study, the ${\mu}c$-SiGe:H layer for triple solar cells applications was performed to optimize the film properties.

• Electrical & Electronic Materials
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• v.9 no.6
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• pp.600-604
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• 1996

High-T$_{c}$, superconducting wire is very important element for the application of electrical power systems. But it is very difficult to develope the long high T, wire with excellent properties. BiSrCaCuO multi-layer tapes are fabricated by a rolling method and pressing method sintered for several step at 840.deg. C. The critical current densities of 637 filament multi-layer tapes sintering 100 hours fabricated by the rolling method and pressing method are 1.3*10$^{4}$ A/cm$^{2}$ and 5.5*10$^{3}$ A/cm$^{2}$. The critical cur-rent densites of multi-layer tapes made by rolling method are found to be better than those fabricated by the powder-in-tube method and pressing process. As result, the rolling method is the best way to fabricated the multi-layer filament.t.

• IEIE Transactions on Smart Processing and Computing
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• v.5 no.1
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• pp.55-62
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• 2016

In this paper, we propose a hybrid multi.system-on-chip (H-MSoC) architecture that provides a high-flexibility system in a rapid development time. The H-MSoC approach provides a flexible system-on-chip (SoC) architecture that is easy to configure for physical- and application-layer development. The physical- and application-layer aspects are dynamically designed and modified; hence, it is important to consider a design methodology that supports rapid SoC development. Physical layer development refers to intellectual property cores or other modular hardware (HW) development, while application layer development refers to user interface or application software (SW) development. H-MSoC is built from multi-SoC architectures in which each SoC is localized and specified based on its development focus, either physical or application (hybrid). Physical HW development SoC is referred to as physical-SoC (Phy-SoC) and application SW development SoC is referred to as application-SoC (App-SoC). Phy-SoC and App-SoC are connected to each other via Ethernet. Ethernet was chosen because of its flexibility, high speed, and easy configuration. For prototyping, we used a LEON3 SoC as the Phy-SoC and a ZYNQ-7000 SoC as the App-SoC. The proposed design was proven in real-time tests and achieved good performance.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.4
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• pp.630-643
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• 2001

In this paper, the performance of a Multi-Carrier DS-CDMA system with Hybrid $SC/MRC- L_{c}/L$ diversity in the multipath Rayleigh fading environment is analyzed and compared with that of a Wideband DS-CDMA system. Each carriers of the number of the input diversity branches in the Multi-Carrier DS-CDMA system is L and among L, the branches of $L_c$ are chosen to be maximum-ratio-combined. And the diversity outputs are coherent-detected and despread by the correlator of each carrier. As the result, we have known that the structure of the Wideband DS-CDMA system with Hybrid $SC/MRC-L_{c}/L$ diversity reception becomes simple due to no synchronization of bit or phase and in terms of the error performance, the performance of Hybrid $SC/MRC- L_{c}/L$ diversity is better than that of selection diversity, but worse than that of MRC diversity. Moreover, the performance of a Multi-Carrier DS-CDMA system is better than that of a Wideband DS-CDMA system in multipath Rayleigh fading channel since Hybrid $SC/MRC- L_c/L$ diversity can obtain gain from each diversity branch. In case four carriers are used and required BER is $10^{-6}$ in wireless data communication, Hybrid SC/MRC-2/4 diversity can increase more 17 users than Hybrid SC/MRC-2/3 diversity because the better input branches can be selected through increase of input branches.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.3
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• pp.73-77
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• 2023

In this study, we developed a Multi-level FeRAM (Ferroelectrics random access memory) device utilizing different ferroelectric materials and analyzed its operation through C-V analysis using simulations. To achieve Multi-level operation, we proposed an MFM (Multi-Ferroelectric Material) structure by depositing two different ferroelectric materials with distinct properties horizontally on the same bottom electrode and subsequently adding a gate electrode on top. By analyzing C-V peaks based on the polarization phenomenon occurring under different voltage conditions for the two materials, we confirmed the feasibility of achieving Multi-level operation, where either one or both of the materials can be polarized. Furthermore, we validated the process for implementing the proposed structure using semiconductor fabrication through process simulations. These results signify the significance of the new structure as it allows storing multiple states in a single memory cell, thereby greatly enhancing memory integration.