• Title/Summary/Keyword: Multi epitaxial

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Growth Interruption Effects of GaAs/AlGaAs Quantum Wells Grown by Molecular Beam Epitaxy (분자선에피택시에 의해 성장한 GaAs/AlGaAs 양자우물의 성장 멈춤 효과)

  • Kim, Min-Su;Leem, Jae-Young
    • Journal of the Korean Vacuum Society
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    • v.19 no.5
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    • pp.365-370
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    • 2010
  • The growth interruption effects on growth mode of the GaAs and AlGaAs epitaxial layers grown on GaAs substrate by molecular beam epitaxy were investigated. Growth process of the epitaxial layers as a function of the growth interruption time was observed by reflection high energy electron diffraction (RHEED). The growth interruption time was 0, 15, 30, 60 s. The GaAs/$Al_{0.3}Ga_{0.7}As$ multi quantum wells (MQWs) with different growth interruption time were grown and its properties were investigated. RHEED intensity oscillation and optical property of the MQWs were dependent on the growth interruption time. When the growth interruption time was 30 s, interface between the well and barrier layers became sharper.

Study on the Current Spreading Effect of Blue GaN/InGaN LED using 3-Dimensional Circuit Modeling (3차원의 회로 모델링을 이용한 청색 GaN/InGaN LED의 전류 확산 효과에 관한 연구)

  • Hwang, Sung-Min;Shim, Jong-In
    • Korean Journal of Optics and Photonics
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    • v.18 no.2
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    • pp.155-161
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    • 2007
  • A new and simple method of 3-dimensional circuit modeling and analysis is proposed and verified experimentally for the first time by determining 3-dimensional current flow and 2-dimensional light distribution in blue InGaN/GaN multi-quantum well (MQW) light emitting diode (LED) devices. Circuit parameters of the LED consist of the resistance of the metallic film and epitaxial layer, and the intrinsic diode which represents the active region emitting the light. The circuit parameters are extracted from the transmission line model (TLM) and current-voltage relation. We applied the >> proposed method and extracted circuit parameters to obtain the light emission pattern in a top-surface emitting-type LED. The current spreading effect is analyzed theoretically and quantitatively with a variation of the resistance of metallic and epitaxial layers. The emitting-light distribution of the fabricated blue LED showed a good agreement with the analyzed result, which shows the dark emission intensity at the corner of the p-electrode.

Epitaxial growth of buffer layers for superconducting coated conductors (초전도 선재용 완충층의 결정성장 연구)

  • Chung, Kook-Chae;Yoo, Jai-Moo;Kim, Young-Kuk;Wang, X.L.;Dou, S.X.
    • Progress in Superconductivity and Cryogenics
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    • v.9 no.3
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    • pp.5-8
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    • 2007
  • All three buffer layers of $Y_2O_3$, YSZ, and $CeO_2$ have been deposited on the biaxially textured metal substrates using rf-sputtering method, The first 50-70nm thick $Y_2O_3$ films were grown epitaxially on biaxially textured metal substrates as a seed layer and followed by the diffusion barrier ${\sim}100nm$ thick YSZ and subsequent capping layer ${\sim}200nm$ thick $CeO_2$ deposited epitaxially on top of $Y_2O_3$ seed layer. The epitaxial orientation of all three layers were all (100) grown with rocking curve Full Width at Half Maximum(FWHM) of $4-5^{\circ}$ and in plane phi-scan FWHM of $6-8^{\circ}$ using X -ray diffraction analysis. The NiO phases formed during the $Y_2O_3$ seed layer deposition seem to degrade the crystallinity and roughen the surface morphology of the following layer observed by AFM(Atomic Force Microscopy). The buffered tapes were used as substrates for long length YBCO coated conductors with high critical current density $J_c$. The five multi-turn of metal tapes was employed to increase the thickness of films and production rate to compensate the low growth rate of rf-sputtering method.

Analysis of Process and Layout Dependent Analog Performance of FinFET Structures using 3D Device Simulator (3D Device simulator를 사용한 공정과 Layout에 따른 FinFET 아날로그 특성 연구)

  • Noh, SeokSoon;Kwon, KeeWon;Kim, SoYoung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.4
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    • pp.35-42
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    • 2013
  • In this paper, the analog performance of FinFET structure was estimated by extracting the DC/AC characteristics of the 22 nm process FinFET structures with different layout considering spacer and SEG using 3D device simulator, Sentaurus. Based on the analysis results, layout methods to enhance the analog performance of multi-fin FinFET structures are proposed. By adding the spacer and SEG structures, the drive current of 1-fin FinFET increases. However, the unity gain frequency, $f_T$, reduces by 19.4 % due to the increase in the total capacitance caused by the added spacer. If the process element is not included in multi-fin FinFET, replacing 1-finger with 2-finger structure brings approximately 10 % of analog performance improvement. Considering the process factors, we propose methods to maximize the analog performance by optimizing the interconnect and gate structures.

Fabrication of White Light Emitting Diode Lamp Designed by Photomasks with Serial-parallel Circuits in Metal Interconnection ($\cdot$병렬 회로로 금속배선된 포토마스크로 설계된 백색LED 조명램프 제조 공정특성 연구)

  • Song, Sang-Ok;Kim, Keun-Joo
    • Journal of the Semiconductor & Display Technology
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    • v.4 no.3 s.12
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    • pp.17-22
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    • 2005
  • LED lamp was designed by the serial-parallel integration of LED chips in metal-interconnection. The 7 $4.5{\times}4.5\;in^{2}$ masks were designed with the contact type of chrome-no mirror?dark. The white epitaxial thin film was grown by metal-organic chemical vapor deposition. The active layers were consisted with the serial order of multi-quantum wells for blue, green and red lights. The fabricated LED chip showed the electroluminescence peaked at 450, 560 and 600 nm. For the current injection of 20 mA, the operating voltage was measured to 4.25 V and the optical emission power was obtained to 0.7 $\mu$W.

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Single Mode Lasing in InGaAsP/InP Semiconductor Coupled Square Ring Cavities

  • Hyun, Kyung-Sook;Lee, Taekyu;Moon, Hee-Jong
    • Journal of the Optical Society of Korea
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    • v.16 no.2
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    • pp.157-161
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    • 2012
  • This work reports the stability of the resonant characteristics in multimode interferometer coupled square ring semiconductor cavities. Based on the analysis of single square ring cavities, the single mode operations in the multimode interferometer coupled ring cavities are analyzed and the devices are demonstrated on the semiconductor multiple quantum well epitaxial structure. By varying the lasing conditions such as substrate temperature and input pump power, single resonant mode operations are also observed.

Metal-Organic Vapor Phase Epitaxy : A Review II. Process and charactristics (MOVPE 단결정층 성장법 II. MOVPE공정 및 특징)

  • 정원국
    • Journal of Surface Science and Engineering
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    • v.23 no.2
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    • pp.1-10
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    • 1990
  • Metal-Organic Vapor Phase Epitaxy (MOVPE) is an epitaxial process utilizaing ane or more of organometallice as reactnte to grow compound semicond semiconductror layers. MOVPE is basically a cold wall process in which reactants are delivered without reacting with each other to the heated substrate where reactants are thermally decomposed to from compound semiconductors through chemical reaction. Since reactants are delivered as gas phase and the formation of the single crystal compunds depends on the thermal decomposition of the reactants, details of MOVPE relies on the hydrodynamics and pyroltsis and chemical reation of reactants inside on reaction chamber. It has been demonstrated that MOVPE is capable of growing virtually all of the III-V, II-VI and IV-VI compound semiconductrs, fabricating ultrathin epilayers, for ming abrupt hetrointerfaces with monolayer transition width, and is suitable for multi-wafer operation yilding a high throghtput. Overiew of reactror componts and layer, characteristics, and status of MOVPE are discussed.

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Microstructure and Thermal Properties of Mn-Ir/Ni-Ee Exchange Biased Multilayers (Mn-Ir/Ni-Fe 교환결합형 다층박막의 미세구조 및 열적특성)

  • 윤성용;전동민;김장현;서수정;노재철;이확주
    • Journal of the Korean Magnetics Society
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    • v.10 no.6
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    • pp.274-279
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    • 2000
  • The microstructure and thermal properties of the Mn-IriNi-Fe exchange biased multi-layers with various buffer layers and stacking structures have been investigated. The H$_{e{\chi}}$ and the T$_{b}$ depend on the Mn-Ir grain size at the interface between the Mn-Ir layer and the Ni-Fe layer, The (111) preferred orientation of Mn-Ir/Ni-Fe on the Ta buffer layer may promote the values of J$_{k}$ and H$_{e{\chi}}$. The samples which produce the Hex have the epitaxial relationship at the interface between the Mn-Ir layer and the Ni-Fe layer due to the generation of misfit dislocation.

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The effect of deposition temperature/pressure on the superconducting properties of YBCO coated conductor (YBCO coated conductor의 초전도 특성에 미치는 박막 증착 온도/압력의 영향)

  • Park, Chan;Ko, Rok-Kil;Chung, Jun-Ki;Choi, Soo-Jeong;Song, Kyu-Jeong;Park, Yu-Mi;Shin, Ki-Chul;Shi, Dongqi;Yoo, Sang-Im
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.05a
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    • pp.30-33
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    • 2003
  • YBCO coated conductor, also called the 2nd generation high temperature superconducting wire, consists of oxide multi-layer hetero-epitaxial thin films. Pulsed laser deposition (PLD) is one of many film deposition methods used to make coated conductor, and is the one known to be the best to make superconducting layer so far. As a part of the effort to make long length coated conductor, the optimum deposition condition of YBCO film on single crystal substrate (SrTiO3) was investigated using PLD. Substrate temperature, oxygen partial pressure, and laser fluence were varied to find the best combination to grow high quality YBCO film.

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Characteristics of Semiconductor-Atomic Superlattice for SOI Applications (SOI 응용을 위한 반도체-원자 초격자 구조의 특성)

  • Seo, Yong-Jin;Park, Sung-Woo;Lee, Kyoung-Jin;Kim, Gi-Uk;Park, Chang-Jun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.11a
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    • pp.180-183
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    • 2003
  • The monolayer of oxygen atoms sandwitched between the adjacent nanocrystalline silicon layers was formed by ultra high vacuum-chemical vapor deposition (UHV-CVD). This multi-layer Si-O structure forms a new type of superlattice, semiconductor-atomic superattice (SAS). According to the experimental results, high-resolution cross-sectional transmission electron microscopy (HRTEM) shows epitaxial system. Also, the current-voltage (I-V) measurement results show the stable and good insulating behavior with high breakdown voltage. It is apparent that the system may form an epitaxially grown insulating layer as possible replacement of silicon-on-insulator (SOI), a scheme investigated as future generation of high efficient and high density CMOS on SOI.

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