• Journal of Korea Society of Digital Industry and Information Management
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• v.12 no.1
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• pp.89-95
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• 2016

Recent growth of hacking threats and development in software and technology put Network security under threat, In addition, intrusion, malware and worm virus have been increased due to the existence of variety of sophisticated hacking methods. The goal of this study is to compare Snort Alpha version with Suricata 2.0.11 version whereas previous study focuses on comparison between snort 2. x version under thread environment and Suricata under multi-threading environment. This thesis' experiment environment is set as followed. Intel (R) Core (TM) i5-4690 3. 50GHz (4threads) of CPU, 16GB of RAM, 3TB of Seagate HDD, Ubuntu 14.04 are used. According to the result, Snort Alpha version is superior to Suricata in performance, but Snort Alpha had some glitches when executing pcap files which created core dump errors. Therefore this experiment seeks to analyze which performs better between Snort Alpha version that supports multi packet processing threads and Suricata that supports multi-threading. Through this experiment, one can expect the better performance of beta and formal version of Snort in the future.

• Journal of Communications and Networks
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• v.13 no.4
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• pp.408-417
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• 2011

The stringent performance requirement for the high efficiency of routing protocols on the Internet can be satisfied by exploiting the threaded border gateway protocol (TBGP) on multi-cores, but the state-of-the-art TBGP performance is restricted by a mass of contentions when racing to access the routing table. To this end, the highly-efficient parallel access approach appears to be a promising solution to achieve ultra-high route processing speed. This study proposes a general routing table structure consisting of two-level tries for fast parallel access, and it presents a heuristic-based divide-and-recombine algorithm to solve a mass of contentions, thereby accelerating the parallel route updates of multi-threading and boosting the TBGP performance. As a projected TBGP, this study also modifies the table operations such as insert and lookup, and validates their correctness according to the behaviors of the traditional routing table. Our evaluations on a dual quad-core Xeon server show that the parallel access contentions decrease sharply by 92.5% versus the traditional routing table, and the maximal update time of a thread is reduced by 56.8 % on average with little overhead. The convergence time of update messages are improved by 49.7%.

• Journal of the Korea Institute of Military Science and Technology
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• v.25 no.2
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• pp.177-186
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• 2022

A network QoS model for the joint integrated C4I structure was proposed for the integration of network infrastructure and network operations(NetOps) for NCOE. Detailed QoS requirements process of the joint integrated C4I systems are needs in the Multi-Domain Operation Environment(MDOE). A process is proposed for identifying QoS requirements and establishing in the MDOE using JMT(Joint Mission Thread) reference architecture and solution architecture. Mission analysis identify JCOAs(Joint Critical Operational Activities) and related activities based on JMT & System architecture's OVs, and Information analysis identify QoS attributes using System architecture's SVs. Identifying QoS attributes will be registered at PPS Registry by pre-regulated process, and will be set-up by NetOps. MDOE QoS requirement Process will support efficiently MUM-T and smart defense platform users under the future uncertain battlefield circumstances.

• Journal of computational fluids engineering
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• v.18 no.1
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• pp.83-90
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• 2013

OpenMP is becoming more and more useful as a simple parallel processing paradigm on SMP (Shared Memory Multi-Processors) computing environment with the development of multi-core processors. However, very few data is available publically regarding the OpenMP performance in CFD (Computational Fluid Dynamics). In the present study a CFD test suite is prepared for the performance evaluation of OpenMP on various multi-core systems. The test suite is composed of two-dimensional numerical simulations for inviscid/viscous and reacting/non-reacting flows using three different levels of grid systems. One to five test runs were carried out on various systems from dual-core dual threads to 16-core 32-threads systems by changing the number of threads engaged for each test up to 80. The results exhibit some interesting results and the lessons learned from the tests would be quite helpful for the further use of OpenMP for CFD studies using multi-core processor systems.

• Journal of KIISE
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• v.43 no.3
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• pp.304-313
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• 2016

We present a novel memory-efficient parallel ray casting algorithm for unstructured grid volume rendering on multi-core CPUs. Our method is based on the Bunyk ray casting algorithm. To solve the high memory overhead problem of the Bunyk algorithm, we allocate a fixed size local buffer for each thread and the local buffers contain information of recently visited faces. The stored information is used by other rays or replaced by other face's information. To improve the utilization of local buffers, we propose an image-plane based ray grouping algorithm that makes ray groups have high coherency. The ray groups are then distributed to computing threads and each thread processes the given groups independently. We also propose a novel hash function that uses the index of faces as keys for calculating the buffer index each face will use to store the information. To see the benefits of our method, we applied it to three unstructured grid datasets with different sizes and measured the performance. We found that our method requires just 6% of the memory space compared with the Bunyk algorithm for storing face information. Also it shows compatible performance with the Bunyk algorithm even though it uses less memory. In addition, our method achieves up to 22% higher performance for a large-scale unstructured grid dataset with less memory than Bunyk algorithm. These results show the robustness and efficiency of our method and it demonstrates that our method is suitable to volume rendering for a large-scale unstructured grid dataset.

• Journal of the Korea Computer Industry Society
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• v.5 no.3
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• pp.393-404
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• 2004

Recently, public home have used a more than two computer connected with network, and several home appliances using independently with internet or network are developing to be related closely with the network. Therefore, the home utilized for a simple terminal of the global network in the past is being expanded to another part of the sub network. For a variety of connecting home-area protocols with the existing existing network, we require a new Residential Gateway(RG) that does not only make the home-area network operating in the sub network but also connects to the external network. In this paper, RG has intrinsic limits against flexible service due to IP address assignment and hardware capacity. In order to solve this problem in the RG, we propose a Management Server(MS). The MS that offers the integrated managements and control services for a variety of devices connected the RG in the home-area. It can not only solve the dynamic IP address assigning problem but also assigns private IP addresses to the home network devices through the Network Address Translation(NAT). It also provides somewhat useful functions for the home network and the RG for other additional services. <중략> The MS is using a SNMP protocol for managing the RG in the domain, a polling method of the MS and the RG compose a sequence polling method, a polling method using a multi-process and a multi-thread. In this paper, we introduce a problem with polling method separately, show a polling method between the MS and the RG using a multi-thread.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.38 no.1
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• pp.71-79
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• 2014

A parallelization of the bi-conjugate gradient solver for the pressure equation of the CUPID (component unstructured program for interfacial dynamics) code, which was developed for analyzing the components of a pressurized water-cooled reactor, was studied in a symmetric multi-processing system. The parallel performance was investigated for three typical parallel programming models (MPI, OpenMP, Hybrid) by solving incompressible backward-facing step flow at various grid resolutions. It was confirmed that parallel performance was low when problem size was small or the memory requirement for each thread was considerably higher than the cache memory. Furthermore, it was shown that MPI was better than OpenMP regardless of the problem size, and Hybrid was the best when the number of threads was relatively small.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.12
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• pp.141-149
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• 2013

This paper presents a high-speed intrusion detection process for multi-core video surveillance systems. The high-speed intrusion detection was designed to a parallel process. Based on the analysis of the conventional process, a parallel intrusion detection process was proposed so as to be accelerated by utilizing multiple processing cores in contemporary computing systems. The proposed process performs the intrusion detection in a per-frame parallel manner, considering the data dependency between frames. The proposed process was validated by implementing a multi-threaded intrusion detection program. For the system having eight processing cores, the detection speed of the proposed program is higher than that of the conventional one by up to 353.76% in terms of the frame rate.

• The KIPS Transactions:PartA
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• v.18A no.1
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• pp.19-24
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• 2011

As era of multi-core processors has arrived, transactional memory has been considered as an effective method to achieve easy and fast multi-threaded programming. Various hardware transactional memory systems such as UTM, VTM, FastTM, LogTM, and LogTM-SE, have been introduced in order to implement high-performance multi-core processors. Especially, LogTM-SE has provided study performance with an efficient memory management policy and a practical thread scheduling method through conflict detection based on signatures. However, increasing number of cores on a processor imposes the hardware complexity for signature processing. This causes overall performance degradation due to the heavy workload on signature comparison. In this paper, we propose a new architecture of multiple signature comparison to improve conflict detection of signature based transactional memory systems.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.589-592
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• 2016

The period of the previous multi-core could be helped to improve program performance, based on the development of the hardware. However, one of the core performance enhancements for this encounter limitations and become the common way of multi-core with multiple cores. Modern programming concurrency that improves the conventional method for using threads of the kernel level in order to use the multi-core come to the fore. Using modern lightweight thread concurrency programming is to optimize the benefits of multi-core. Also sharing the absence of available data that can change is a major consideration when writing concurrent code. This paper describes the key considerations when creating a discussion concurrent code, and these issues are being supported in any way in the language of one 'go' of technologies that support the modern concurrency, and even how to write better code concurrency.