DOI QR코드

DOI QR Code

OPENMP PARALLEL PERFORMANCE OF A CFD CODE ON MULTI-CORE SYSTEMS

멀티코어 시스템에서 쓰레드 수에 따른 CFD 코드의 OpenMP 병렬 성능

  • Kim, J.K. (Dept. of Aerospace Engineering, Graduate School of Pusan Nat'l Univ.) ;
  • Jang, K.J. (Dept. of Aerospace Engineering, Graduate School of Pusan Nat'l Univ.) ;
  • Kim, T.Y. (Dept. of Aerospace Engineering, Graduate School of Pusan Nat'l Univ.) ;
  • Cho, D.R. (Dept. of Aerospace Engineering, Graduate School of Pusan Nat'l Univ.) ;
  • Kim, S.D. (Dept. of Aerospace Engineering, Pusan Nat'l Univ.) ;
  • Choi, J.Y. (Dept. of Aerospace Engineering, Pusan Nat'l Univ.)
  • 김종관 (부산대학교 대학원 항공우주공학과) ;
  • 장근진 (부산대학교 대학원 항공우주공학과) ;
  • 김태영 (부산대학교 대학원 항공우주공학과) ;
  • 조덕래 (부산대학교 대학원 항공우주공학과) ;
  • 김성돈 (부산대학교 항공우주공학과) ;
  • 최정열 (부산대학교 항공우주공학과)
  • Received : 2013.01.09
  • Accepted : 2013.03.05
  • Published : 2013.03.31

Abstract

OpenMP is becoming more and more useful as a simple parallel processing paradigm on SMP (Shared Memory Multi-Processors) computing environment with the development of multi-core processors. However, very few data is available publically regarding the OpenMP performance in CFD (Computational Fluid Dynamics). In the present study a CFD test suite is prepared for the performance evaluation of OpenMP on various multi-core systems. The test suite is composed of two-dimensional numerical simulations for inviscid/viscous and reacting/non-reacting flows using three different levels of grid systems. One to five test runs were carried out on various systems from dual-core dual threads to 16-core 32-threads systems by changing the number of threads engaged for each test up to 80. The results exhibit some interesting results and the lessons learned from the tests would be quite helpful for the further use of OpenMP for CFD studies using multi-core processor systems.

Keywords

References

  1. $Intel^{(R)}$ Xeon $Phi^{TM}$ Coprocessor 5110P, http://www.intel.co.kr /content/www/kr/ko/processors/xeon/xeon-phi-detail.html.
  2. 2011, OpenMP Application Program Interface, Version 3.1 OpenMP Architecture Review Board, http://www.openmp.org/ mp-documents/OpenMP3.1.pdf.
  3. 2012, $Intel^{(R)}$ 64 and IA-32 Architecture Software Developer's Manual Vol.1,2,3, Intel Corporation, http://www.i ntel.com.
  4. 1994, Singh, D.J. and Jachimowski, C.J., "Quasigolbal Reaction Model for Ethylene Combustion," AIAA Journal, Vol.32-1, p213. https://doi.org/10.2514/3.11972
  5. 2009, Shin, J.-R., Moon, S.-H., Won, S.-H. and Choi, J.-Y., "Detached Eddy Simulation of Base Flow in Supersonic Mainstream," Journal of KSAS, Vol.37-10, p.955. https://doi.org/10.5139/JKSAS.2009.37.10.955
  6. 2005, Choi, J.-Y., Yang, V. and Ma, F., "Combustion Oscillations in a Scramjet Engine Combustor with Transverse Fuel Injection," Proc. Combust. Inst. Vol.30, p. 2851. https://doi.org/10.1016/j.proci.2004.08.250
  7. 2012, Fortran Compiler Comparisons, Polyhedron Software, http://www.polyhedron.com/compare0html.
  8. Intel Processor Comparison, http://ark.intel.com/compare/40200,47922,64595.
  9. 2010, Balakrishnan, G., Begun, R.M. and Kochuparambil, B., Understanding Intel Xeon 5600 Series Memory Performance and Optimization in IBM System x and BladeCenter Platforms, IBM, http://public.dhe.ibm.com/common/ssi/ecm/en/xsw03075usen/XSW03075USEN.PDF.
  10. 2009, An Introduction to the $Intel^{(R)}$ QuickPath Interconnect, Intel, http://www.intel.com/content/dam/doc/white-paper/quickpath- interconnect-introduction-paper.pdf.
  11. 2002, Choi, J.-Y. and Oh, S., "An Acceleration Scheme of LU-SGS Code on Latest Microprocessors Considering Increased Hit-ratio of Level 2 Cache," Journal of KSAS, Vol.30-7, p.68.