• 전자공학회논문지 IE
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• v.48 no.4
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• pp.61-68
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• 2011

As business management has a high level of dependence on Informational Technology (IT), protecting assets of a company from disaster is one of the most important thing that IT operating managers should consider. Because data or information is a major source of operation of the company, data security is the first priority as an aspect of continuity of business management. Therefore, this paper will realize disaster recovery system, which is suspended because of disaster, based on cloud computing system. Realized High Available Replicate System applied a method of multi thread target database to improve Replicate performance, and real time synchronize technology can improve efficiency of network. From Active to Active operation, it maximizes use of backup system, and it has a effect to disperse load of source database system. Also, High Available Replicate System realized consistency verification mechanism and monitoring technique. For Performance evaluation, High Available Replicate System used multi thread method, which shows more than threefold of replicate performance than single thread method.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.6
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• pp.808-816
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• 2016

As the number of CPU/GPU cores and IPs in SOC increases and applications require explosive memory bandwidth, simultaneously achieving good throughput and fairness in the memory system among interfering applications is very challenging. Recent works proposed priority-based thread scheduling and channel partitioning to improve throughput and fairness. However, combining these different approaches leads to performance and fairness degradation. In this paper, we analyze the problems incurred when combining priority-based scheduling and channel partitioning and propose dynamic priority thread scheduling and adaptive channel partitioning method. In addition, we propose dynamic address mapping to further optimize the proposed scheme. Combining proposed methods could enhance weighted speedup and fairness for memory intensive applications by 4.2% and 10.2% over TCM or by 19.7% and 19.9% over FR-FCFS on average whereas the proposed scheme requires space less than TCM by 8%.

• Archives of Plastic Surgery
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• v.47 no.3
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• pp.256-262
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• 2020

Background Most women consider an oval-shaped face to be youthful and beautiful. In recent years, demand has grown for surgical procedures with a shorter downtime and fewer complications. These minimally invasive procedures include botulinum toxin type A (BoNTA) injection, filler injection, suction-assisted liposuction (SAL), laser-assisted lipolysis (LAL), thread lifting, and fat grafting. This study aims to introduce an effective method for creating an aesthetically pleasing lower face using a combination of minimally invasive procedures. Methods From March 2017 to March 2019, 94 patients simultaneously underwent LAL, SAL, and thread lifting. Ancillary procedures such as BoNTA injections, hyaluronic acid filler injections, and removal of the buccal fat pad (BFP) were selectively performed according to the patient's condition. Results Patients rated their postoperative satisfaction as very satisfied, satisfied, dissatisfied, or very dissatisfied. Approximately 83% of all respondents were satisfied with the results, whereas the remaining respondents had complaints regarding the outcomes. The most common reasons for dissatisfaction were a longer-than-expected recovery time and undercorrection, and the most severe complaint was skin depression as a result of overcorrection. Conclusions Our method of simultaneously performing LAL, SAL, and thread lifting, while adding BoNTA, filler injections, and BFP removal as needed, was capable of producing consistent and reliable aesthetic outcomes for the lower face.

• Journal of IKEEE
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• v.12 no.4
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• pp.246-254
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• 2008

This paper represents a design of a 4 way SIMD processor with multi-thread and dual phase instruction pipeline. 8 threads can be performing in round-robin order, so any hazards can’t occur. The dual phase pipeline makes a pipeline operate as two pipelines, and it can fetch maximum 4 unit instructions at once. This variable length instruction set divide into first phase and second phase instructions, and with this function, complex branch and addressing can be executed at one clock cycle. This processor reduces the code size to quarter, pull out the doubled performance improvement than normal SIMD architecture.

• 한국정보디스플레이학회:학술대회논문집
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• 2006.08a
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• pp.1251-1254
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• 2006

A novel a-Si TFT integrated gate driver circuit using multi-thread driving has been developed. The circuit consists of two independent shift registers alternating between the two mode, "wake" and "sleep". The degradation of the circuit is retarded since the bias stress is removed during the sleep mode. It has been successfully integrated in 14.1-in. XGA LCD Panel, showing enhanced stability.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.5C
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• pp.512-521
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• 2002

Recently, conventional superscalar RISC processors arrive their performance limit, and many researches on the next-generation architecture are concentrated on SMT(Simultaneous Multi-Threading). In SMT processors, multiple threads are executed simultaneously and share hardware resources dynamically. In this case, it is more important to supply instructions from multiple threads to processor core efficiently than ever. Because SMT architecture shows higher IPC(Instructions per cycle) than superscalar architecture, performance is influenced by fetch bandwidth and the size of fetch queue. Moreover, to use TLP(Thread Level Parallelism) efficiently, fetch thread selection algorithm and fetch bandwidth for each selected threads must be carefully designed. Thus, in this paper, the performance values influenced by these factors are analyzed. Based on the results, an optimal instruction fetch strategy for SMT processors is proposed.

• KIPS Transactions on Computer and Communication Systems
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• v.6 no.9
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• pp.385-396
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• 2017

Many IoT platforms have been proposed for various IoT devices, from low-end to high-end performance. We previously proposed a new IoT platform called MinT that supports the operation of the sensing devices and network communication. In the proposed platform, the things can flexibly connect to each other and efficiently share their information. Most IoT platforms, including the MinT, support thread pooling to quickly process requests. However, using a thread pool with a fixed thread count can cause network delay and inefficient energy consumption. In this paper, we propose an enhanced method to manage the thread pool efficiently by adjusting the number of threads every cycle to regulate the device's performance. In particular, we aim to improve the performance of the Interaction Thread Pool Group, which is responsible for analyzing, processing, and re-transmitting the received packets. The experiment shows that the improved method increases the average throughput by approximately 25% compared to the existing platforms. Finally, using the proposed method, the MinT can reduce the transmission delay and energy consumption of devices in the IoT environment.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.05a
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• pp.53-55
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• 2013

In general, various numerical techniques such as MoM, TLM, FEM, and BEM can be introduced to analyze some microwave device and electromagnetic propagation problems. Numerical simulator based on Java thread-level parallelism for improving computation performance is implemented and estimated.

• Journal of the Korea Society of Computer and Information
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• v.22 no.11
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• pp.1-7
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• 2017

In this paper, we introduce three monitoring filtering techniques which reduce the overheads of dynamic data race detection. It is well known that detecting data races dynamically in multi-threaded programs is quite hard and troublesome task, because the dynamic detection techniques need to monitor all execution of a multi-threaded program and to analyse every conflicting memory and thread operations in the program. Thus, the main drawback of the dynamic analysis for detecting data races is the heavy additional time and space overheads for running the program. For the practicality, we also empirically compare the efficiency of three monitoring filtering techniques. The results using OpenMP benchmarks show that the filtering techniques are practical for dynamic data race detection, since they reduce the average runtime overhead to under 10% of that of the pure detection.

• Journal of the Korean Society of Radiology
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• v.9 no.7
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• pp.487-493
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• 2015

The reconstruction on the computed tomography requires much time for calculation. The calculation time rapidly increases with enlarging matrix size for improving image quality. Multi-core processor, multi-core CPU, has widely used nowadays and has provided the reduction of the calculation time through multi-threads. In this study, the calculation time of the reconstruction process would improved using multi-threads based on the multi-core processor. The Pthread and the OpenMP used for multi-threads were used in convolution and back projection steps that required much time in the reconstruction. The Pthread and the OpenMP showed similar results in the speedup and the efficiency.