• Journal of Korea Foundry Society
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• v.20 no.5
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• pp.300-306
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• 2000

The objective of this work was to investigate the effects of SiC particle size(50, 100 ${\mu}m$) and additional elements such as Si, Cu and Ti on aging behavior in Al-5Mg-X(Si,Cu,Ti)/SiCp composites fabricated by pressureless infiltration method using hardness and wear test, scanning electron microscopy(SEM) and differential scanning calorimetry(DSC). The peak aging time in Al-5Mg-X(Si, Cu, Ti)/SiCp(50, 100 ${\mu}m$) composites is shorter than Al-5Mg-0.3Si alloy.The peak aging time of 50 ${\mu}m$ SiC particle reinforced Al-5Mg-X(Si,Cu,Ti) composites is shorter than those of 100 ${\mu}m$ SiC particle reinforced of Al-5Mg-X(Si,Cu,Ti) composites. The Al-5Mg-0.3Si-0.1Cu-0.1Ti/SiCp(50 ${\mu}m$) composites aged at $180^{\circ}C$ has higher hardness and better wear resistance than any other aged composite.The aging effect is promoted by the addition of Si and Cu in Al-5Mg/SiCp composites, so the wear resistance of Al-5Mg/SiCp composites with Si and Cu elements is enhanced by the aging treatment.

• 한국신재생에너지학회:학술대회논문집
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• 2011.05a
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• pp.128.2-128.2
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• 2011

스테인레스 스틸 유연기판 위에 플라즈마 화학기상 증착법 (plasma enhanced chemical vapor deposition)을 이용하여 nip 구조의 미세결정질 실리콘 박막 태양전지 (microcrystalline silicon thin film solar cell)를 제조하고 i ${\mu}c$-Si:H광 흡수층과 p ${\mu}c$-Si:H 사이에 i a-Si:H 버퍼 층을 삽입하여 i/p 계면특성을 개선하고 이에 따른 태양전지 성능특성 변화를 조사하였다. ${\mu}c$-Si:H 박막으로 이루어진 i/p 계면에서의 구조적, 전기적 결함은 태양전지 내에서 생성된 캐리어의 재결합과 shunt resistance 감소를 초래하여 개방전압 (open circuit voltage) 및 곡선 인자 (fill factor)를 감소시키는 것으로 알려졌다. 제조된 미세결정질 실리콘 박막 태양전지는 SUS/Ag/ZnO:Al/n ${\mu}c$-Si:H/i ${\mu}c$-Si:H/p ${\mu}c$-Si:H 구조로 제작되었으며 i/p 계면 사이의 i a-Si;H 버퍼층 두께를 변화시키고 이에 따른 태양전지의 특성을 조사하였다. 태양전지의 구조적, 전기적 특성 변화는 Scanning Electron Microscope (SEM), UV-visible-nIR spectrometry, Photo IV와 Dark IV를 통하여 조사하였다.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1025-1028
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• 2005

Microcrystalline Si (${\mu}c-Si$) TFTs were fabricated using a conventional bottom gate amorphous Si (a-Si) process. A unique ${\mu}c-Si$ deposition technique and TFT architecture was proposed to enhance the reliability of the TFTs. This three-mask TFT fabrication process is comparable with existing a-Si TFT procesess. In order to suppress nucleation at the bottom interface of Si, before deposition of the ${\mu}c-Si$ an $N_2$ plasma passivation was conducted. A typical transfer characteristic of the TFTs shows a low off-current with a value of less than 1 pA and a sub threshold slop of 0.7 V/dec. The DC stress was applied to verify the use of ${\mu}c-Si$ TFTs for AMOLED displays. After 10,000 s of application of the stress, the off-current was even lowered and sub-threshold slope variation was less than 5%. For AMOLED displays, OLED pixel simulation was performed. A pixel current of 13 ${\mu}A$ was achieved with $V_{data}$ of 10 V. After the simulation, a linear equation for the pixel current was suggested.

• Journal of the Korean Magnetics Society
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• v.17 no.4
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• pp.147-151
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• 2007

We have investigated the half-metallicity and magnetism for the Heusler ferromagnet $Co_2$ZrSi interfaced with semiconductor ZnTe along the (001) plane by using the full-potential linearized augmented plane wave (FLAPW) method. We considered low types of possible interfaces: ZrSi/Zn, ZrSi/Te, Co/Zn, and Co/Te, respectively. From the calculated density of states, it was found that the half-metallicity was lost at all the interfaces, however for the Co/Te system the value of minority spin density of states was close to zero at the Fermi level. These facts are due to the interface states, appeared in the minority spin gap in bulk $Co_2$ZrSi, caused by the changes of the coordination and symmetry and the hybridizations between the interface atoms. At the Co/Te interface, the magnetic moments of Co atoms are 0.68 and $0.78{\mu}_B$ for the "bridge" and "antibridge" sites, respectively, which are much reduced with respect to that ($1.15{\mu}_B$) of the bulk $Co_2$ZrSi. In the case of Co/Zn, Co atoms at the "bridge" and "antibridge" sites have magnetic moments of 1.16 and $0.93{\mu}_B$, respectively, which are almost same or slightly decreased compared to that of the bulk $Co_2$ZrSi. On the other hand, for the ZrSi/Zn and ZrSi/Te systems, the magnetic moments of Co atoms at the sub-interface layers are in the range of $1.13{\sim}1.30\;{\mu}_B$, which are almost same or slightly increased than that of the bulk $Co_2$ZrSi.

• Journal of the Microelectronics and Packaging Society
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• v.14 no.3
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• pp.57-64
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• 2007

New Chip-on-glass technology to attach an Si chip directly on the glass substrate of LCD panel was studied with local heating method of the Si chip by using thin film heater fabricated on the Si chip. Square-shaped Cu thin film heater with the width of $150\;{\mu}m$, thickness of $0.8\;{\mu}m$, and total length of 12.15 mm was sputter-deposited on the $5\;mm{\times}5\;mm$ Si chip. With applying current of 0.9A for 60 sec to the Cu thin film heater, COG bonding of a Si chip to a glass substrate was successfully accomplished with reflowing the Sn-3.5Ag solder bumps on the Si chip.

• Journal of the Korean Vacuum Society
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• v.4 no.3
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• pp.327-333
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• 1995

전자소자의 축소화에 따라 박막배선에서의 electromigration은 점차 극소전자 디바이스의 주요 결함원인으로 부각되고 있다. 본 실험에서는 현재 박막 배선 재료로 가장 널리 사용되고 있는 AI-1%Si 금속박막배선의 electromigration에 대한 온도 및 배선길이의 의존성에 관하여 연구하였다. PSG($8000AA$)/SiO2(1000$\AA$)/AI-1%Si(7000$\AA$)/SiO2(5000$\AA$)/p-Si(100)의 보호막처리되지 않은 시편 등을 standard photolithography 공정을 이용하여 각각 제작하였다. 선폭 3$\mu$m, 길이 100, 400, 800, $\1600mu$m등의 AI-1%Si 배막배선구조를 사용하였다. 가속화실험을 위해 인가된 d.c.전류밀도는 4.5X106A/$ extrm{cm}^2$이었고 실온에서 $100^{\circ}C$까지의 분위기 온도에서 electromigration test를 진행하였다. 박막배선의 길에에 따른 MTF(Mean-Time-to-Failure)는 임계길이 이상에서 포화되는 경향을 보이며 이는 보호막층의 유무에 관계없이 나타난다. 선폭 $3\mu$m인 AI-1%Si 박막배선에서 임계길이는, 보호막처리된 시편은 $800\mu$m, 보호막처리되지 않은 시편은 $400\mu$m 배선길이에서 나타난다. 이러한 포화의 경향은 낮은 온도에서 더욱 명확해지는 특성을 보인다. 각 시편에서 electromigration에 대한 활성화에너지도 MTF의 특성과 유사하게 임계길이 이상에서 포화되는 특성을 보인다.

• Korean Journal of Optics and Photonics
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• v.1 no.2
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• pp.135-141
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• 1990

Optical nonlinearity of laser heated Si with thickness of 160$\mu$m is investigated by pump-probe method. Si is heated by pdsed Nd:YAG laser of $TEM_{00}$-mode with pulse duration of 180$\mu$sec. Temperature change is monitored by observing transmittance change of probe light whose wavelength lies near band gap of Si. It is found that temperature rise is linearly proportional to incident laser intensity and the maximum temperat~re increment is measured to be $16^{\circ}C$ for the maximum incident intensity of 25KW/$\textrm{cm}^2$. From these results, the third order nonlinear susceptibility .d3) at the wavelength of 1.06$\mu$mis estimated to be $6.6\times10^{-5}$esu due to laser heating.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.4
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• pp.821-825
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• 2004

The a-Si：H TFTs decreasing parasitic capacitance of source-drain is fabricated on glass. The structure of a-Si：H TFTs is inverted staggered. The gate electrode is formed by patterning with length of 8 ${\mu}m∼16 ${\mu}m. and width of 80∼200 ${\mu}m after depositing with gate electrode (Cr) 1500 under coming 7059 glass substrate. We have fabricated a-SiN：H, conductor, etch-stopper and photoresistor on gate electrode in sequence, respectively. The thickness of these thin films is formed with a-SiN：H (2000 ), a-Si：H(2000 ) and n+a-Si：H (500). We have deposited n+a-Si：H ,NPR(Negative Photo Resister) layer after forming pattern of Cr gate electrode by etch-stopper pattern. The NPR layer by inverting pattern of upper gate electrode is patterned and the n+a-Si：H layer is etched by the NPR pattern. The NPR layer is removed. After Cr layer is deposited and patterned, the source-drain electrode is formed. The a-Si：H TFTs decreasing parasitic capacitance of source-drain has channel length of 8 ~20 ${\mu}m and channel width of 80∼200 ${\mu}m. And it shows drain current of 8 ${\mu}A at 20 gate voltages, Ion/Ioff ratio of 108 and Vth of 4 volts.

• Proceedings of the Korean Vacuum Society Conference
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• 1995.06a
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• pp.48-49
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• 1995

전자소자의 축소화에 따라 electromigration은 점차 반도체 디바이스의 주요 결함 원 인으로 부각되고 있다. 본 실험은 현재 배선 재료로 널리 사용되고 있는 Al-1%Si 금속박막 배선의 electromigration에 대한 온도 및 배선길이 의존성에 관하여 연구하였다. ppLCC(pplastic Leaded Chipp Carrier) ppackage된 ppSG(8000$\AA$)/SiO2(1000$\AA$)/Al-1%Si(7000 $\AA$)/SiO2(5000$\AA$)/pp-typpe Si(100)의 보호막처리된 시편과 Al-1%Si/SiO2(5000$\AA$)/pp-typpe Si(100)의 보호막처리되지 않은 시편등을 standard pphotolithograpphy 공정을 이용하여 각각 제작하였다. 선폭 3$mu extrm{m}$, 길이 100, 400, 800, 1600$\mu\textrm{m}$의 등의 Al-1%Si 박막배선구조를 사용하 였다. 가속화실험을 위해 인가된 D.C 전류밀도는 4.5$\times$106A/cm2이었고 실온에서 10$0^{\circ}C$까지 의 분위기 온도에서 electromigration를 실행하였다. 박막배선길이에 따른 MTF(Mean Time-to-Failure)는 임계길이 이상에서 포화되는 경향을 보이며 임계길이는 Al-1%Si 박막 배선에서 분위기온도에 따라 길이 400$\mu\textrm{m}$과 800$\mu\textrm{m}$범위에서 나타났다. 각 시편에서 electromigration에 대한 활성화에너지도 MTF의 특성과 유사하게 임계길이 이상에서 포화 되는 특성을 타나내었다.

• Journal of Korea Foundry Society
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• v.20 no.4
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• pp.254-259
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• 2000

Metal matrix composites(MMCs) reinforced with hard particles have many potential application in aerospace structures, auto parts, semiconductor package, heat resistant panels, wear resistant materials and so on. In this work, the effect of SiC partioel sizes(50 and 100 ${\mu}m$) and additional elements such as Si, Cu and Ti on the microstructure and the wear property of $Al-5Mg-X(Si,Cu,Ti)/SiC_p$ composites produced by pressureless infiltration method have been investigated using optical microscopy, scanning eletron microcopy(SEM) with EDS(energy dispersive spectrometry), hardness test, X-ray diffractometer(XRD) and wear test. In present study, the sound $Al-5Mg-X(Si,Cu,Ti)/SiC_p$(50 and 100 ${\mu}m$) composites were fabricated by pressureless infiltration method. The $Al-5Mg-0.3Si-O.1Cu-O.1Ti/SiC_p$ composite with $50 {\mu}m$ size of SiC particle has higher hardness and better wear property than any other composite with $100{\mu}m$ size of SiC particle produced by pressureless infiltration method. The hardness and wear property of $Al-5Mg/SiC_p$(50 and 100 ${\mu}m$) composites were enhanced by the addition of Si, Cu and Ti in Al-5%Mg matrix alloy.