• Journal of Auto-vehicle Safety Association
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• v.15 no.3
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• pp.27-33
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• 2023

Electric vehicles are widely produced from many car manufacturers around the world instead of internal combustion engine vehicle in order to respond a variety of environmental regulations. Also, they are applying for modular design method to develop plenty of the vehicles. And, both of these two issues will be an important trend to lead the future global automobile industries for a long time. In this paper, new brake architecture concept is proposed in order to respond to such a situation. First, physical interfaces between brake system like caliper, disc and other counter-parts are established for modular assembly. Second, we analyze effective factors of brake system for electric vehicles which need to reflect vehicle specifications such as total vehicle weight. Here, we consider ideal brake force by critical deceleration. Third, we simulate accumulated regenerative brake energy for two main driving modes to confirm to effectiveness for a variety of Electric Vehicle. Finally, we hope that it contributes to implement brake architecture for the development of Electric Vehicle platform through such a study.

• The KIPS Transactions:PartC
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• v.10C no.4
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• pp.405-412
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• 2003

As the XML is approved standard language by the UN, the progress which complemented the XML security has being processed rapidly. In this paper, we design and implement the "XML-Signcryption" as a security mechanism to protect the XML document that can operate between other platforms. The signature and encryption which is the standard specification in W3C needs to be able to proceed them separately. Generally the signature and encryption require four times modular exponential operation, however the signcryption only needed three times modular exponential operation. This will benefit overall system effectiveness in terms of cost. And this scheme offers to convenient the user, because the signature and encryption implement as a single XML format. This tool can save the parsing time as a number of tags is few within a document. And also, in this paper, based on a research of Web Services security, we can apply XML-Signcryption to the SOAP message to provide the security services. Based on the XML-Signcryption scheme which provides confidentiality, integrity, authentication and non-repudiation to the XML document and Web Service security simultaneously.

• Korean Journal of Construction Engineering and Management
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• v.21 no.3
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• pp.76-84
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• 2020

The rate of application of the modular plant in the plant industry is increasing, and for the success of the modularization projects, it is essential to develop and implement a systemized methodology across all phases of the project. However, Korean EPC firms lack project management capability when it comes to apply standardized methodology. Therefore, it is important to establish and systematize the cost/schedule integrated management method which are the two core elements of project management technology. This study was conducted to develop a methodology and guidelines for integrated management process for modular plant projects. The researchers developed a methodology for planning and managing cost and schedule, and integrated by module unit. Integrated cost and schedule methodology and guidelines developed can be used for various EPC modular plant projects to enhance the efficiency of project management.

• Journal of Korea Society of Industrial Information Systems
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• v.10 no.3
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• pp.57-63
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• 2005

Kim and Fenn et al. proposed two modular AB multipliers based on LFSR(Linear Feedback Shift Register) architecture. These multipliers use AOP, which has all coefficients with '1', as an irreducible polynomial. Thereby, they have good hardware complexity compared to the previous architectures. This paper proposes a modular $AB^2$ multiplier based on LFSR architecture and a modular exponentiation architecture to improve the hardware complexity of the Kim's. Our multiplier also use the AOP as an irreducible polynomial as the Kim architecture. Simulation result shows that our multiplier reduces the hardware complexity about $50\%$ in the perspective of XOR and AND gates compared to the Kim's. The architecture could be used as a basic block to implement public-key cryptosystems.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.17 no.10
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• pp.2822-2843
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• 2023

All aspects of human life have become increasingly dependent on data in the last few decades. The development of several applications causes an enormous issue on data volume in current years. This information must be safeguarded and kept in safe locations. Massive volumes of data have been safely stored with cloud computing. This technology is developing rapidly because of its immense potentials. As a result, protecting data and the procedures to be handled from attackers has become a top priority in order to maintain its integrity, confidentiality, protection, and privacy. Therefore, it is important to implement the appropriate security measures in order to prevent security breaches and vulnerabilities. An improved version of Modular Encryption Standard (IMES) based on layered modelling of safety mechanisms is the major focus of this paper's research work. Key generation in IMES is done using a logistic map, which estimates the values of the input data. The performance analysis demonstrates that proposed work performs better than commonly used algorithms against cloud security in terms of higher performance and additional qualitative security features. The results prove that the proposed IMES has 0.015s of processing time, where existing models have 0.017s to 0.022s of processing time for a file size of 256KB.

• IEMEK Journal of Embedded Systems and Applications
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• v.7 no.2
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• pp.79-84
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• 2012

Efficient arithmetic design is essential to implement error correcting codes and cryptographic applications over finite fields. This article presents an efficient $AB^2$ multiplier in GF($2^m$) using a polynomial representation. The proposed multiplier produces the result in m clock cycles with a propagation delay of two AND gates and two XOR gates using O($2^m$) area-time complexity. The proposed multiplier is highly modular, and consists of regular blocks of AND and XOR logic gates. Especially, exponentiation, inversion, and division are more efficiently implemented by applying $AB^2$ multiplication repeatedly rather than AB multiplication. As compared to related works, the proposed multiplier has lower area-time complexity, computational delay, and execution time and is well suited to VLSI implementation.

• Proceedings of the IEEK Conference
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• 2000.06e
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• pp.159-162
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• 2000

This paper addresses the design and implementation problem of the mobile robot with the synchronous driving mechanism that consists of modular control systems based on the Universal Serial Bus (USB). Recently, the USB have attracted the hardware developers'interests due to its low cost, compatibility, and extenability. In particular, the USB enables us to organize the whole system in the modular manner very easily, and this property plays a very important role in shortening the developing time in implementing the target system, for example, the mobile robot system. In this paper, we implement the USB motion controller and the USB ultrasonic sensor system and verified the validity and the effectiveness of the proposed system through the real experiments including the mobile robot navigation and the environment recognition.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2002.06a
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• pp.190-194
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• 2002

Multiplication in Galois Field GF(2/sup m/) is a primary operation for many applications, particularly for public key cryptography such as Diffie-Hellman key exchange, ElGamal. The current paper presents a new architecture that can process Montgomery multiplication over GF(2/sup m/) in m clock cycles based on cellular automata. It is possible to implement the modular exponentiation, division, inversion /sup 1)/architecture, etc. efficiently based on the Montgomery multiplication proposed in this paper. Since cellular automata architecture is simple, regular, modular and cascadable, it can be utilized efficiently for the implementation of VLSI.

• Nuclear Engineering and Technology
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• v.56 no.3
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• pp.1108-1115
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• 2024

Assuring physical security for Micro Modular Reactors (MMRs) will be key to their licensing. Economic constraints however require changes in how the security objectives are achieved for MMRs. A promising new approach is the so-called performance based (PB) approach wherein the regulator formally sets general security objectives and leaves it to the licensee to set their own specific acceptance criteria to meet those objectives. To implement the PB approach for MMRs, one performs a consequence-based analysis (CBA) whose objective is to study hypothetical malicious attacks on the facility, assuming that intruders take control of the facility and perform any technically possible action within a limited time before an offsite security force can respond. The scenario leading to the most severe radiological consequences is selected and studied to estimate the limiting impact on public health. The CBA estimates the total amount of radionuclides that would be released to the atmosphere in this hypothetical scenario to determine the total radiation dose to which the public would be exposed. The predicted radiation exposure dose is then compared to the regulatory dose limit for the site. This paper describes application of the CBA to four different MMRs technologies.

• Journal of IKEEE
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• v.24 no.3
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• pp.901-908
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• 2020

This paper describes a method for scalable hardware implementation of modular inversion. The proposed scalable architecture has a one-dimensional array of processing elements (PEs) that perform arithmetic operations in 32-bit word, and its performance and hardware size can be adjusted depending on the number of PEs used. The hardware operation of the scalable processor for modular inversion was verified by implementing it on Spartan-6 FPGA device. As a result of logic synthesis with a 180-nm CMOS standard cells, the operating frequency was estimated to be in the range of 167 to 131 MHz and the gate counts were in the range of 60,000 to 91,000 gate equivalents when the number of PEs was in the range of 1 to 10. When calculating 256-bit modular inverse, the average performance was 18.7 to 118.2 Mbps, depending on the number of PEs in the range of 1 to 10. Since our scalable architecture for computing modular inversion in GF(p) has the trade-off relationship between performance and hardware complexity depending on the number of PEs used, it can be used to efficiently implement modular inversion processor optimized for performance and hardware complexity required by applications.